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Co-simulation interface ups algorithm integration, system-level design

12 Jul 2012

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Aldec Inc. has partnered with Agilent Technologies to offer a co-simulation interface between the latest version of Riviera-PRO, Aldec's design simulation and verification platform used by FPGA, ASIC and SoC development teams, and SystemVue, Agilent's ESL design and signal processing environment used by system architects and algorithm developers in physical layer designs of wireless, RF and DSP applications. The solution enables users to efficiently integrate algorithm and system-level designs with hardware implementations, noted the firms.

The co-simulation interface requires only one instance of Riviera-PRO (regardless of the number of HDL blocks on a SystemVue diagram), supports a range of data types and provides extensive cross-domain debugging capabilities. The tight, bi-directional integration reduces development time and effort by enabling continuous test and system-level verification throughout the development process, added the companies.

To access the interface, valid licenses for the latest versions of both Riviera-PRO and SystemVue are required. Current license holders are encouraged to upgrade.




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