Path: EDN Asia >> Design Centre >> IC/Board/Systems Design >> Comparison of inter-IC digital interfaces for audio data transfer
IC/Board/Systems Design Share print

Comparison of inter-IC digital interfaces for audio data transfer

17 Aug 2012  | Jerad Lewis

Share this page with your friends

An I2S bus uses three signal lines for data transfer – a frame clock, a bit clock, and a data line. The two clocks can be generated by the receiving IC, the transmitting IC, or even a separate clock-master IC, depending on the system architecture (figure 3). An IC with an I2S port can often be set to be in either master or slave mode. Unless a sample-rate converter is being used in the signal chain, a system will usually have a single I2S master device so that there are no issues with data synchronization.

The Philips standard for these signals uses the names WS for word select, SCK for the clock, and SD for the data, although IC manufacturers seem to rarely use these names in their IC datasheets. Word select is also commonly called LRCLK, for "left/right clock", and SCK may be called BCLK, for "bit clock" or SCLK for "serial clock".

Figure 3: I2S connection diagram, receiver as master.

The name of an IC's serial data pin varies most from one IC vendor to another, and even within a single vendor's different products. A quick survey of audio IC datasheet shows that the SD signal may also be called SDATA, SDIN, SDOUT, DACDAT, ADCDAT, or other variations on these, depending on whether the data pin is an input or output.

An I2S data stream can carry one or two channels of data with a typical bit clock rate between 512kHz, for an 8kHz sampling rate, and 12.288MHz, for a 192kHz sampling rate. The data word length is often 16, 24, or 32 bits. For word lengths less than 32 bits, the frame length is often still 64 bits and the unused bits are just driven low by the transmitting IC.

Although it is rare, some ICs only support I2S interfaces with a maximum of 32 or 48 bit clocks per stereo audio frame. A system designer has to be careful when using one of these ICs to make sure that the devices on the other end of its connections can also support these bit clock rates.

While I2S format is the most commonly used, there are other variants of this same three-wire configuration, such as left-justified, right-justified, and PCM modes. These differ from I2S by the position of the data word in the frame, the polarity of the clocks, or the number of bit clock cycles in each frame.

TDM formats Some ICs support multiple I2S data inputs or outputs using a common clock, but this obviously increases the number of pins necessary to transfer the data. Time division multiplexed (TDM) formats are used when more than two channels of data are to be transferred on a single data line. A TDM data stream can carry as many as sixteen channels of data and has a data/clock configuration similar to that of I2S.

Each channel of data uses a slot on the data bus that is 1/Nth the width of the frame, where N is the number of channels being transferred. For practical purposes, N is usually rounded up to the nearest power-of-two (2, 4, 8, or 16) and any additional channels are left empty. A TDM frame clock is often implemented as a single bit-wide pulse, rather than I2S's 50% duty-cycle clock. Clock rates above 25MHz are not commonly used for TDM data, since higher frequencies cause board layout issues that PCB designers would rather avoid.

TDM is commonly used for a system with multiple sources feeding one input, or one source driving multiple devices. In the former case, each TDM source shares a common data bus. The source must be configured to drive the bus only during its appropriate channel, and tri-state its driver while the other devices are driving the other channels.

There is no standard for TDM interfaces, such as the Philips standard for I2S. This means that many ICs have their own slightly-different flavor of a TDM implementation. These differences may include clock polarities, channel configuration, and tri-stating or driving unused channels. Of course, these different ICs will usually work together, but a system designer needs to take care to ensure that outputs of one device will spit out data in the format that the inputs of another are expecting!

PDM data connections
PDM data connections are becoming more common in portable audio applications, such as cellphones and tablet computers. This is an advantage in these size-constrained applications because PDM audio signals can be routed around noisy circuitry, such as LCD screens, without having to deal with interference issues analog audio signals might have.

 First Page Previous Page 1 • 2 • 3 Next Page Last Page


Want to more of this to be delivered to you for FREE?

Subscribe to EDN Asia alerts and receive the latest design ideas and product news in your inbox.

Got to make sure you're not a robot. Please enter the code displayed on the right.

Time to activate your subscription - it's easy!

We have sent an activate request to your registerd e-email. Simply click on the link to activate your subscription.

We're doing this to protect your privacy and ensure you successfully receive your e-mail alerts.


Add New Comment
Visitor (To avoid code verification, simply login or register with us. It is fast and free!)
*Verify code:
Tech Impact

Regional Roundup
Control this smart glass with the blink of an eye
K-Glass 2 detects users' eye movements to point the cursor to recognise computer icons or objects in the Internet, and uses winks for commands. The researchers call this interface the "i-Mouse."

GlobalFoundries extends grants to Singapore students
ARM, Tencent Games team up to improve mobile gaming


News | Products | Design Features | Regional Roundup | Tech Impact