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ARM Cortex-A7 tapes out on 14nm FinFET

26 Dec 2012

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The tape-out of the 14nm test chip implementation of the ARM Cortex-A7 high-performance processor has just been announced by ARM and Cadence Design Systems Inc. The chip is with a complete Cadence RTL-to-signoff flow and is ARM's most energy-efficient applications processor. ARM Cortex-A7 is the first to target Samsung's 14nm FinFET process, which accelerates the move to ultra-low power and high-density SoCs for tablets, smartphones and other mobile devices.

In addition to the ARM Cortex-A7 processor, the test chip includes ARM Artisan standard-cell libraries, next-generation memories, and general purpose IOs. The test chip was designed using a complete Cadence RTL-to-signoff flow including Encounter RTL Compiler, Encounter Test, Encounter Digital Implementation System, Cadence QRC Extraction, Encounter Timing System and Encounter Power System. This achievement is part of a systematic programme to enable ARM technology-based SoCs on FinFET technology.

"End consumers are driving the need for better, faster, more connected devices," said Dr. Kyu-Myung Choi, senior vice president of System LSI infrastructure design centre, Device Solutions, Samsung Electronics. "Our collaboration with ARM and Cadence allows us to innovate quickly as Samsung develops this new process technology for mobile multimedia applications."




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