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Obtain efficient dual-rail power supply from USB

24 Jun 2013  | R O Ocaya

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Due to the flux linkage between the primary winding and the secondary winding, with the primary circuit open, the inductor's stored but collapsing magnetic field induces a voltage at the secondary side high enough (>VOUT) to forward bias the diode. The initial value of the current will be I2=IPK/n. During the time that the diode is forward biased, the voltage across the secondary winding will equal (VOUT+0.7). This can also be seen as a transformation of the primary-side voltage down to VOUT/n. The switch, therefore, has to withstand a voltage of effectively


when it is open. This last equation highlights the main advantage that the flyback converter has over the boost converter of comparable input and output voltages, namely the reduced voltage the switch must handle when it is opened. In effect, the voltage during the "off" phase is transformed down to a value determined by the transformer winding turns ratio. This allows a MOSFET with a much lower breakdown voltage to be used. Additionally, in the boost-converter topology, the diode must handle both the high "on" current and a high reverse voltage in the "off" phase. In the flyback converter, the diode at the secondary side has to withstand only a high voltage while the current is low (IPK/n). This permits the use of a diode with smaller capacitances that results in higher switching speed with the consequence of reduced energy losses and an increased efficiency.

Although it is beyond our current scope, you can calculate the output voltage by equating the amount of energy input in L1 to the energy transferred to the load, RLOAD. In steady state, the output is related to the duty cycle, D, of the switch and the frequency at which the switch is operated; that is, the open-circuit output voltage is given by


Better circuit operation and stability
In the practical circuit of figure 2, all of the elements of the basic flyback circuit of figure 1 can be identified.

However, there are a number of refinements that lead to better operation and stability. For example, two output diodes are configured so that dual-rail output is possible. Also, the positive rail feedback is sampled by the voltage divider comprising R4 and R5, with a level that is smoothed by capacitor C2. In normal 555 astable operation, the output waveform generation is possible since the timing capacitor (C1) charges from VCC through the sum of R1 and R2 and discharges through R2. With the resistor values used (that is, R2>>R1), the duty cycle is close to 50%. The charging/discharging voltage levels are internally set to VCC/3 and 2VCC/3 (that is, 1.67V and 3.33V, respectively, if operated at 5V). Without feedback, the values in figure 2 give an open-loop output voltage of about 20V.

Figure 2: In this complete circuit, you can use many alternatives for M1, Q1, and the Schottky diodes.


The feedback operates as follows: The transistor, Q1, does not conduct until the voltage at its base (VBE) is around 0.55V. This enables the output voltage to be calculated from


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