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Mentor rolls out test solutons for HDMI 2.0

11 Oct 2013

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Mentor Graphics has revealed hardware and software solutions to accelerate the verification of High-Definition Multimedia Interface (HDMI) version 2.0 products. Mentor's latest verification solutions enable designers to test the HDMI 2.0 devices integrated on their System-on-Chip (SoC) designs, and develop and stress-test their software and hardware with billions of verification cycles before silicon is available.

iSolve Multimedia, a 'plug-and-play' hardware interface to the Veloce family of hardware emulators provides a cost-effective and efficient solution to verify new HDMI 2.0 devices in the SoC design. Users can create compliant HDMI 2.0 frames on-the-fly from industry-standard files, such as AVI or other file formats, and exercise their design with thousands of HDMI frames. High-performance, graphical analysis tools help to identify problems related to the digital video/audio output from the user's design, and perform debug that is critical in determining the functional correctness of the SoC. This new hardware solution adds to the existing iSolve family of solutions for the accelerated verification of applications such as networking, embedded systems, wireless, storage, and multimedia devices.

Complementing the iSolve solution is the Mentor Veloce VirtuaLAB Multimedia for HDMI 2.0 that provides the same level of functionality for HDMI users as the iSolve solution, but in a pure software-based environment or "virtual lab" environment. This option increases the flexibility of using the Veloce emulator for multiple users worldwide, where they can use the Veloce emulator as a data centre resource and not be concerned with hardware setups.

The company also introduced a verification IP (VIP) solution that delivers both a simulation environment, using the Questa functional verification platform, and accelerated simulation environment using the Veloce emulator for the verification of HDMI 2.0-compliant devices. It generates the appropriate stimuli for the Design-Under-Test (DUT), passing packets, or transactions, of protocol data for tests. The VIP solution also provides a high-level Application Programming Interface (API) for use with multiple test-bench environments, such as SystemVerilog/UVM and SystemC, and provides example test environments that can exercise the emulated HDMI 2.0 device. All solutions are also compatible with the previous HDMI 1.4 standard for user flexibility.

The new HDMI 2.0 products deliver use modes with traditional in-circuit emulation (ICE), virtual lab emulation, and high-performance, transaction-based acceleration. When combined with the Veloce2 emulator, the latest-generation emulator from Mentor Graphics, these Multimedia products deliver high-performance and easy-to-use IP and system-level verification for verifying SoCs containing HDMI 2.0 devices, without compromising delivery schedules.

Further information about Mentor Graphics' latest solutions can be found here.




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