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FPGA-based prototyping system offers up to 4M ASIC gates

18 Dec 2013

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Synopsys has launched its HAPS Developer eXpress (HAPS-DX) FPGA-based prototyping system designed for complex IP and sub-system prototyping. The system, which features pre-integrated hardware and software, is an extension of Synopsys' HAPS FPGA-based prototyping product line and includes customised synthesis and debug software to speed prototype bring-up and streamline the transition from individual IP blocks to full system-on-chip (SoC) validation. The company says the HAPS-DX offers up to four million ASIC gates of capacity and is plug-and-play compatible with the HAPS-70 series, thus allowing for prototyping from IP to full SoC for software development, hardware/software integration, and system validation.

"Xilinx Virtex-7 X690T FPGA devices support 11.3 Gb/s serdes data transfer rate, making them ideal for high-bandwidth and high-performance ASIC prototype designs," said Hanneke Krekels, director of test, measurement, and emulation market segment at Xilinx. "Synopsys' HAPS-DX systems accelerate prototype bring-up via adoption of the industry standard FMC I/O technology supported by our Virtex-7 X690T FPGA, allowing designers to leverage hundreds of available FMCs, including analogue-to-digital/digital-to-analogue converters, video imaging, and motor control."

The new, customised prototyping software included with HAPS-DX accelerates prototype availability through automated translation into a HAPS-DX specific implementation. New prototyping diagnostic and fast prototyping modes reduce the RTL review time and provide up to five times faster throughput than traditional FPGA synthesis tools. Time-consuming tasks such as ASIC clock conversion are accelerated utilising the new HAPS clock optimisation, allowing even the most complex clocking schemes to be implemented quickly in a clock-limited FPGA architecture. In addition, direct support for Synopsys Design Constraints (SDC) format and Universal Power Format (UPF) speeds the migration of the SoC's timing and power intent into the prototype.

Synopsys HAPS Developer eXpress

HAPS-DX systems simplify debugging tasks by including the HAPS Deep Trace Debug hardware, in combination with Synopsys Verdi3 debug software. HAPS Deep Trace Debug enables storage of seconds of signal trace data using included DDR3 memory. The flexible debug storage options for HAPS-DX address the need for high-speed sampling and high-capacity storage. In addition, HAPS-DX's debug software seamlessly integrates with Synopsys Verdi3 advanced debug platform to provide enhanced analysis and debug visualisation.

Engineers can leverage a broad set of HAPS daughter boards through Synopsys HapsTrak 3 connectors and standard FMCs to minimise the effort of assembling prototypes that connect to real-world interfaces. To speed system validation and software development tasks, Synopsys DesignWare Interface IP such as PCI Express, USB, MIPI, and DDR are being pre-validated on HAPS-DX systems enabling software development earlier in the product development cycle and reducing the IP integration effort.

HAPS-DX's integrated UMRBus interface and optional transactors for ARM AMBA interconnect provide a direct connection between a HAPS-DX system and VDKs (Virtualizer Development Kits) generated using Synopsys Virtualizer toolset to create an integrated hybrid prototyping environment. Hybrid prototyping enables pre-RTL software development, hardware/software integration, and full system validation.




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