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Q&A: PC boards for EMC mitigation

24 Dec 2013  | Kenneth Wyatt

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This instalment focuses on PC boards and related topics. As mentioned in the first part of this series, I will be discussing various EMC concerns all the best I can. Be advised that for many questions pertaining to EMC, the best answer is, "it depends", so there may not be one answer for all cases. I'll try to include my assumptions in the answers. The questions have been edited for clarity.


Q. Will you address analogue and digital ground separation and when you tie them together to chassis ground.

A. Good question. Currently, there is some debate as to whether there should be separate ground planes or just a single one. First, let me state up front that I prefer to call these planes "signal return" and "power return" planes, rather than ground planes. Referring to them as signal and power returns are more accurately descriptive and remind the designer that currents flow in loops. Very often we designers inadvertently divert the return current path over a longer route, which can cause radiated emissions and other immunity issues. Remember, at frequencies above 100kHz, the return current wants to flow along the path of least impedance. This is usually directly under the signal or clock trace.

So, your question boils down to controlling the paths of analogue and digital return currents. By splitting the analogue and digital return planes, noisy digital return currents will stay out of the sensitive analogue area. Obviously, one wouldn't want to run digital signal traces across isolated analogue areas, as this would also contaminate the analogue area. The latest thinking, however (Todd Hubing, Clemson University) is that it's best to keep the return planes as a single plane and be careful about routing the signal traces (keeping in mind the corresponding return currents), so they don't cross the A/D boundary. The two planes are generally connected together at the PC board power connector.


Q. What are stitching capacitors? How do I select stitching capacitors? In your early/first example of signal and two power planes how does one add stitching caps—looking for the physical implementation.

A. Stitching capacitors simply allow a path for return currents to get back to the source when crossing multiple planes with differing potentials—for example, power and signal return planes. They need to be located as closely as possible to where the high frequency trace penetrates the planes. The value is not critical, but should present a low impedance at the frequency in question (plus harmonics). Most designers use 1 to 10 nF. I explained this in more detail here.


Q. In the slides with the via, where is the ground plane? On both sides? You just show arrows.

A. This is explained more clearly here.


Q. How many layers do you recommend for solving EMC/EMI issues on PCB? E.g. we may define different power and ground layers for analogue and digital signals respectively.

A. From an EMC standpoint, eight, or more, layers has proven best. The problem with four or six-layer board designs is that it becomes very difficult to define a solid low-impedance return path when running high speed signals and clock traces through multiple power/return planes. You also want the power and signal/power return planes to be as close together as possible and sometimes this is difficult to manufacture.


Q. In what case, do we need to separate analogue and digital ground?

A. This was at least partly answered above, but let me just say that the reason we might want to separate analogue and digital return planes is to keep noisy digital signals from contaminating sensitive analogue circuits. The same might hold true if the analogue circuitry might be very noisy—for example motor control switching logic.


Q. A lot of designers like to "star" the grounds. In this sense, a lot of digital traces cross planes. what would would you recommend in this type of scenario?

A. I'm not sure a completely understand your question, so if my answer is unclear, please respond in the "comment" section of the blog posting. A "star" ground usually implies (or is another name for) a "single-point" ground. At high frequencies (say, above 100kHz), so-called single point grounds are near impossible to achieve, due to inductive and capacitive coupling. Basically, there are too many other "sneak" paths. So, my recommendation is normally to design multiple grounding schemes. Single point and multiple grounding usually applies to system grounding, not PC boards, so hence, my confusion. Assuming the plane to which you're referring is a signal return layer, then we want the signal traces crossing over it in order to minimise the impedance to the return currents.


Q. Is multiple shorting of ground planes a good practice?A. Yes, especially if high frequency traces are referenced to both return planes. Multiple vias will provide multiple paths back to the source. There's another phenomenon to keep in mind. At really high frequencies (above 500MHz into the GHz region), the power and power return planes can form a cavity resonance and cause radiated emissions. Adding a pattern of stitching capacitors can help break up this resonance. There are also experiments on the use of "lossy" bypass capacitors (high ESR) mounted around the board that serve to damp the resonances. Refer to Lee Ritchey's work for this technique.

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