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Cadence purchases SystemC-based HLS provider

10 Feb 2014

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Cadence Design Systems announced that it is taking over Forte Design Systems a company that provides arithmetic IP and SystemC-based high-level synthesis (HLS). The definitive agreement is expected to bolster Cadence Design's SystemC HLS for design and multi-language verification.

"Growth in the high-level synthesis market segment is accelerating," said Charlie Huang, senior vice president of the System & Verification Group and Worldwide Field Operations at Cadence. "HLS tools are now addressing a broader application space and producing equal or better quality of results than hand-coded RTL, fueling worldwide adoption and production deployment amongst leading companies. We look forward to welcoming Forte's technology and skilled team to Cadence to help address this opportunity."

Forte brings high quality of results (QoR) for datapath-centric designs, world-class arithmetic IP, valuable SystemC IP and IP development tools. Forte's Cynthesizer HLS product features strong support for memory scheduling, especially for highly parallel or pipelined designs. These strengths complement the high QoR for transaction-level modelling, under-the-hood RTL synthesis and incremental ECO support featured by Cadence C-to-Silicon Compiler.

"Cadence and Forte have compatible approaches to high-level synthesis, and a similar vision to enable migration of design to the system level," said Sean Dart, CEO of Forte. "The combination will benefit customers through a standardised system-level flow, improved product capabilities for both customer bases, and integration all the way to silicon."




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