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DF6808 IP Core achieves 100 million instructions

04 Apr 2014  | Julien Happich

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 DF6808

Despite being binary-compatible with the industry standard Motorola 68HC08 8bit microcontroller, DCD's DF6808 IP Core still performs 45-100 million instructions per second because of its on-chip peripheral capabilities.

FAST architecture implemented in DF6808 enables this MCU to run at least three times faster than the original solution.

The DF6808 Microcontroller Core contains full-duplex UART-Asynchronous Serial Communication Interface (SCI) and the Synchronous Serial Peripheral Interface (SPI). The main 16bit, free-running timer system has two input capture lines and two output-compare lines.

The DF6808 has been equipped with proprietary safety functions, which efficiently hasten the design process. To protect against system errors, self-monitoring circuitry has been included on-chip. The Computer Operating Properly (COP) watchdog system protects against software failures. Moreover, an illegal opcode detection circuit provides a non-maskable interrupt once the illegal opcode occurs.

Two software-controlled power-saving modes, WAIT and STOP, are available to conserve additional power. These modes make the DF6808 IP Core especially attractive for automotive and battery-driven applications.

The DF6808 is fully customisable, which means it's been delivered in the exact configuration, to meet target design requirements. There is no need to pay extra for unused features and wasted silicon. DCD's IP Core includes fully automated test bench with complete set of tests. They allow easy package validation at each stage of SoC design flow.




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