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Xilinx expands 20nm family for 500G

14 May 2014

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Xilinx Inc. announced the expansion of the industry's only 20nm family to enable single chip implementation of 400G and 500G applications , as well as the first shipment of the Virtex UltraScale VU095 All Programmable FPGA. The device provides performance, system integration, and bandwidth for a wide range of applications, such as wired communication, test and measurement, aerospace and defence, and data centre.

Xilinx also added the VU190 FPGA to the Virtex UltraScale family, which combines nearly two million logic cells with over 130Mb on-chip RAM, over a thousand parallel I/O pins, and up to 120 serial transceivers.

The Virtex UltraScale ASIC-class family provides the industry's only programmable path to >2x system level performance and integration with up to 50 per cent power reduction, leveraging a combination of FPGA and production proven 3D IC technologies that provide customers an extra generation of value. The family is co-optimised with the Vivado Design Suite and UltraFast design methodology for productivity, predictability, and device utilisation without performance degradation.

The family incorporates 32.75Gbit/s transceivers for chip-to-chip, chip-to-optics, and 28G backplanes, and features multiple integrated ASIC-class 100G Ethernet and 150G Interlaken cores. Xilinx SmartCORE and LogiCORE solutions provide proven IP cores that address a broad spectrum of functional building blocks for UltraScale designs. UltraScale 20nm devices also offer a seamless footprint migration to future UltraScale 16nm FinFET-based devices.




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