Path: EDN Asia >> Design Centre >> Power/Smart Energy >> Drawbacks of state-transition clock gating
Power/Smart Energy Share print

Drawbacks of state-transition clock gating

15 Jul 2014  | Naman Gupta, Rohit Goyal, Kriti Jain

Share this page with your friends

Clock gating is the most commonly utilised design technique to save dynamic power, and one can find a plethora of technical literature on it and associated techniques. However, many implementations are faulty, in the sense that while they indeed gate the clock, they result in an overall increased dynamic power consumption!

In this paper, we discuss such common pitfalls, and illustrate them with the help of two examples which obviate all the power saving benefits of clock gating.

The basic rationale behind clock gating:
 • Even when the output of a flip-flop is not toggling, owing to the transitions (and hence charging/discharging of nodes) in the internal circuitry of the flop-flop, it still continues to dissipate dynamic power when it is being fed by a clock signal.
 • When the input of the flip-flop is not toggling or would not toggle, one can effectively gate the clock to that flip-flop for that particular time and save dynamic power.

One logical implementation for the above statement is depicted below, and it is referred to as State Transition Clock Gating technique.


Figure 1: Clock Gating a flip-flop using XOR Gate and CGIC.


Implementation of state transition clock gating and its pitfalls
Let's take a look at the above implementation. The XOR gate between the D input and the Q output of the flip-flop has been used as the enable signal for the clock gate CGIC. The logical explanation behind this is: when the output of the flop is same as input, which would be detected by XORing the two, one can gate the clock to the clock gate.

Example: Let's say initially Q =1. Now D = 1, which means that the output of the flop is destined to stay at "1" for the next cycle as well. XORing these two signals: Q XOR D = 0, EN = 0 would gate the clock to the flip-flop. So, would that save power? Well, one would expect it to. Let's take a look at why it would result in increased power dissipation.

The circuit shown in figure 1 is a trap! The actual circuit would be something like the one shown in figure 2.


Figure 2: XOR Gate consumes dynamic power when the D input toggles during the free toggling region.


As evident from the above figure, the XOR gate would continue to toggle for the entire time period of the clock and would become stable only "setup time" before the next clock edge. And during this entire duration, it would continue dissipating dynamic power. One might argue here that the power dissipated must be less than the power dissipated by an idle flop receiving clock. Well, that might be true for some technology, but XOR is the most complex gate (among all primitive gates), and I would say that this power, if not less, would at least be comparable to that of an idle flop receiving a clock signal.

1 • 2 Next Page Last Page


Want to more of this to be delivered to you for FREE?

Subscribe to EDN Asia alerts and receive the latest design ideas and product news in your inbox.

Got to make sure you're not a robot. Please enter the code displayed on the right.

Time to activate your subscription - it's easy!

We have sent an activate request to your registerd e-email. Simply click on the link to activate your subscription.

We're doing this to protect your privacy and ensure you successfully receive your e-mail alerts.


Add New Comment
Visitor (To avoid code verification, simply login or register with us. It is fast and free!)
*Verify code:
Tech Impact

Regional Roundup
Control this smart glass with the blink of an eye
K-Glass 2 detects users' eye movements to point the cursor to recognise computer icons or objects in the Internet, and uses winks for commands. The researchers call this interface the "i-Mouse."

GlobalFoundries extends grants to Singapore students
ARM, Tencent Games team up to improve mobile gaming


News | Products | Design Features | Regional Roundup | Tech Impact