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Next-gen Meridian CDC ups efficiency for SoC design teams

02 Oct 2014

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Real Intent Inc. has released the 2014 version of its Meridian CDC product that aims to perform comprehensive clock domain crossing (CDC) analysis. The latest software has enhanced speed, analysis and debug support, boosting productivity for SoC and FPGA design teams.

According to the company, new Meridian CDC enhancements and updates include modern design intent debugger and data manager, faster performance and better capacity for flat analysis of SoC and FPGA designs and optimised "bottom-up" verification flow. It also has easier design setup and broader SDC design constraint support.

Meridian CDC touts comprehensive structural and functional analysis to ensure that signals crossing asynchronous clock domains on ASIC or FPGA devices are received reliably. With a giga-scale capacity, Meridian CDC enables all aspects of CDC sign-off. It excels in speed and low-noise analysis of SoC designs and includes a formal engine that uncovers hidden CDC issues.

The iDebug debugger in Meridian CDC claims to be the first to employ a full database that captures all phases of CDC verification for the hierarchical analysis of design intent. It distinguishes the root cause for issues, and minimises iterations and debug time through a programmable graphical interface. iDebug supports a fully customisable sign-off methodology that can be tailored for any design-flow. It also eliminates all data compromises, resulting in the most efficient debug process.

The recent Meridian CDC is available in November 2014. Pricing depends on product configuration.




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