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Guard MOSFETs in inductive switched-mode circuits

04 Nov 2014  | Marian Stofka

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The MOSFET power switch is typically the most vulnerable part of a new switched-mode high-power circuit. One threat for this device is exceeding the value of the maximum allowed pulse current. You cannot exceed this limit, even for pulse durations as short as 10 nsec. You could still thermally damage the MOSFET with a high duty cycle even when the drain-to-source current has a value between the peak and the dc ratings. The FET might eventually enter self-oscillations at a frequency, which might be an order of magnitude higher than your planned operating repetition rate. To protect the FET, you can limit the duty cycle by ac coupling the FET-driver circuit. If you further limit the repetition rate to tens of kilohertz, you needn't worry about thermal considerations.



To limit the duty cycle of the pulses, use the Schmitt-trigger input of IC1 (figure 1). You pass the input-voltage waveform through a derivative circuit comprising CD, RD, and RS. The low-to-high transition of the clock causes an abrupt rise of voltage at resistor RD. The output of the noninverting driver therefore goes high. Immediately after this transition, the voltage on RD starts to decrease exponentially. When it falls below VTL, the lower threshold of input INA, output OUTA abruptly falls to 0V. The time constant (RD+RS+RGEN)×CD yields the rate of exponential decrease. RGEN is the output resistance of the generator of the input clock. You can calculate the value of capacitor CD using the desired pulse width, TP:



The equation employs an estimate of the value of VTL:



The IC's data sheet gives the values of 0.8 and 2V as the limits of the low and high input voltages, respectively. The high-to-low transition of the clock has no effect. This transition causes a sharp negative exponential pulse, which an internal Schottky diode at input INA suppresses. The anode of this internal diode connects to ground, and its cathode connects to input INA. Resistor RS limits the peak current flowing through the protective diode to about 10 mA.

The IC has an output current of ±4A. The typical on-resistance of Q1 is 2 mΩ. You interconnect Q2's gate and source pins to create a freewheeling diode. This diode has a typical reverse-recovery time of 33 nsec at a 25A forward current. When Q1 turns off, the peak inductor current flows through Q2. Voltage VR occurs on power resistor R and is superimposed onto the supply voltage, VDDMOS. The sum of these voltages must be lower than or equal to the manufacturer's specified value of the drain-to-source voltage of transistors Q1 and Q2.

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