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How to gate clock pulse train without truncating

22 Jan 2015  | Viktor Safronov

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As we can see from figure 3, total coverage by Moore requires a greater number of maximum compliant subsets, i.e., it's worse. On the other hand, the first state is alternatively a part of sets MC2 and MC3, which presents opportunities for extra circuit optimization. However, we shall not consider this further.

Now, it's easy to draw a compressed state transition table and Karnaugh-Veitch maps for the Z-coding memory element and output gated signal Y:


Figure 4: Map of Z-coding (by Mealy), compressed state transition table, and Z-Y Karnaugh-Veitch maps.


Bearing in mind the Karnaugh-Veitch maps, let's write down logic equations for the synthesized circuit:



The minterm [/E • z] for z+ in this formula is not redundant as it may seem. It plays the important role of a counter-race bridge between minterms [/G • /E] and [G • z], eliminating their consecutive races at all edges of G.


Figure 5: Example implementation of the quantizer, where: /E = inverted input of the asynchronous strobe signal; G = clock; Y = quantizer output.


It is possible to add some extra features – for example, FLAG. When FLAG is low, the first pulse in the burst is not cut, but incorporated in the burst without affecting its duration. When FLAG is high, the first pulse is cut and excluded from the burst. State of the FLAG should be kept unchanged till the next strobe pulse, so your equipment has enough time to read it and use for further processing.

This type of quantizer may be useful in designs sensitive not only to the number of pulses in the burst, but to the pulse phase; for example, in radar equipment.


About the author
Viktor Safronov contributed this article.


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