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Top 10 designs and tutorials of 2014

19 Jan 2015  | Stephen Padilla

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Future home automation standard: ZigBee vs Z-Wave

There have been ongoing talks on which technology is the best overall solution for home automation: ZigBee or Z-Wave? Obviously one will win but can we predict which one?

According to the ZigBee Alliance, ZigBee Home Automation offers a global standard for interoperable products. Standardisation enables smart homes that can control appliances, lighting, environment, energy management and security as well as the expandability to connect with other ZigBee networks.

On the other hand, Sigma Designs explains Z-Wave as a wireless RF-based communications technology designed for control and status reading applications in residential and light commercial environments. Target applications for Z-Wave are home entertainment, lighting and appliances control, HVAC systems and security.

So what is the difference then?


Rule of thumb: Resistance of a copper trace

This rule of thumb is a quick and simple way of estimating the DC resistance of a copper trace on a board.

Spoiler summary: The resistance of a 1/2 ounce circuit board trace is 1mΩ/square x the number of squares down the length of the trace.

In the last rule of thumb, we introduced the sheet resistance of a copper foil. The edge to edge resistance of a section of copper foil, cut in the shape of a square, depends only on the thickness of the foil and the bulk resistivity of the copper.

For 1 ounce thick copper foil, we showed the sheet resistance is 0.5mΩ/sq. For ½ oz copper, it is 1mΩ/sq.

If we have a long, narrow trace on a circuit board etched from ½ oz thick copper foil, every square down its length will have an edge to edge resistance of 1mΩ. If we count up the number of squares in series, we can quickly estimate the total resistance as being simply the number of squares times the sheet resistance.


PCB design: Minimise errors, increase efficiency

Board design is a crucial and time consuming task, and any problems require the engineer to exhaustively go through the design, net by net, and component by component. Arguably, board design requires equal care as chip design.

The first three stages take maximum time because the schematic review is a manual activity. Imagine a SoC board with 1000 or more connections. Reviewing each and every connection manually is a tedious task. It is almost impossible to check each, and this leads to problems in the final board, like wrong connections, floating nodes, etc.

In schematic capture, we face the following kinds of problems:

  • Underscore errors: APLLVDD vs. APLL_VDD
  • Capitalisation issues: VDDE vs. vdde
  • Spelling mistakes
  • Signal short issues
  • ...and many more

In order to avoid these mistakes, there should be a mechanism by which the schematic can be reviewed in seconds. This is made possible by schematic simulation, which is often missing in present board design flows. By schematic simulation, the final output is observed at the required node; hence, it automatically takes care of all connectivity issues.


Pass/fail testing using an oscilloscope

Have you ever employed the pass/fail testing feature in your digital oscilloscope? It's a great tool if you need to set up a repetitive test for a small run of devices. You can also use pass/fail testing in an automated test environment. Having the oscilloscope do the testing is generally faster than transferring the entire waveform into a computer and then processing it off-line.

Many of today's benchtop oscilloscopes offer multiple levels of test criteria. They break down into two broad categories: mask or template testing and parameter-limit testing. Mask testing compares an acquired waveform to a user-defined mask. Parameter limit testing tests are based on the value of a waveform based measurement such as amplitude or frequency. Within each category, you have a choice of logical operations to define whether the waveform passes or fails. The best way to explain this is to show the development of a pass/fail test based on a real waveform.

For our example, I'll use an ultrasonic transducer as the device under test. It produces a 40kHz burst of about 600µs duration that exhibits an exponential rise and decay. A very simple test is to build a simple tolerance mask around the waveform and test that it fits within the mask. Pass/fail testing in the oscilloscope used in this article supports up to eight test conditions. Each test condition, designated as Qn, can be set up independently as a mask test or as a parameter limit test.


Shifting to open-source PCB design

The use of open-source hardware designs and the open-source schematic and PCB layouts that accompany them is one of the current electronic design trends. This is explained by the ease with which engineers can adopt existing designs and, in turn, improve their efficiency and time to market. With better understanding of the design differences between traditional PCB designs and open-source designs, this trend will likely continue.

There are several advantages over traditional PCB design that make open source a more appealing option for engineers. These include re-use of the power and digital sections, as well as high-speed data sections. Engineers have always had to struggle with the power layout, but now with higher speed and RF structures on the board, the task has become much more complex. Engineers must now pay closer attention to the board's trace width, proximity and through-hole vias. In an open-source PCB design, layouts that have already proven effective can be copied – eliminating the need to start the design from scratch.


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