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Explore SAR ADC driver with 2ppm linearity error

18 Feb 2015  | Guy Hoover

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The combined offset at the ADC input, including the contributions of U4, U5 and U1, is measured at +50µV. The offset of U3 has no effect on the offset of this driver.


Figure 3: Linearity vs input voltage.


A worst case analysis of offset at the ADC input is calculated by adding the maximum offsets of U1, U4 and U5:



VOS(MAX) = 13ppm • 10µV/ppm + 75µV/2 +

(5/2 – 5/(2.0001)) • 1E6µV

VOS(MAX) = 292µV = 29.2ppm


The LT1468A has a maximum input bias current of ±40nA. For applications that require higher input impedance, U4 can be replaced with the LT1122A. The LT1122A is a fast settling, JFET input op amp with a maximum input bias current of 75pA. Using the LT1122A in this circuit, the INL is +6ppm, –1.1ppm, as shown in the op amp performance comparison in the table.


Table: Op amp performance comparison.


The LTC2377-20 ADC has a typical supply current of 4.2mA at its full sample rate of 500ksps. The LTC2377 20 automatically powers down after a conversion and does not power up until the next conversion is started. This auto power-down feature reduces the power dissipation of the ADC as the sample rate is reduced to as little as 1µA for very low sample rate applications.

For low sample rate applications where supply current is important, the 5.2mA maximum supply current of the LT1468A may be too high. The LT1012A picoamp input current, microvolt offset, low noise op amp with a maximum supply current of 500µA at ±15V can replace the LT1468A for these applications. With sample rates up to 125ksps, the LT1012A achieved a linearity of +0.9ppm, –0.5ppm, as shown in the op amp performance comparison in Table 1. At sample rates above 125ksps, the INL performance begins to degrade, as the op amp cannot settle fast enough to accurately drive the ADC.


Conclusion
The ADC driver circuit shown here converts a single-ended ±10V signal to a ±5V fully differential signal for the LTC2377-20 500ksps SAR ADC. Combined circuit performance achieves 50µV offset, 2ppm INL, 102.7dBFS SNR and –123.5dB THD. The driver consists primarily of two LT1468A op amps and a LT5400A matched resistor array. Alternative versions of this circuit use the LT1122A op amp to provide 75pA max input current or the LT1012A op amp at reduced sampling rates to reduce supply current. DC2135, a demo board version of this circuit, is available from Linear Technology.


About the author
Guy Hoover is Applications Engineer for mixed signal products at Linear Technology Corp.


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