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Ground and power: Optimising complex circuits

16 Feb 2015  | Nicholaus Smith

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In figure 3, each power supply has been colour-coded for clarity. The most important part of the image is the colouring of the GND return currents. Because multiple power supplies are in series leading to each final load, the GND currents are forced to complete the return paths in the same order they were supplied. For example, the battery powers the BUCK1.2V regulator, which powers the microprocessor; therefore, the current powering the microprocessor will return directly to the BUCK1.2V regulator GND prior to returning to the battery. The failure to envision the entire current loop and the order in which the paths are completed can often create unstable operation or inadequate GND current returns because they are not properly accounted for and controlled in the layout.


Figure 3: Typical Mobile Tablet Application Blocks and Placement.


For example, it is easy to imagine a systems engineer placing the Bluetooth and WiFi antennas in the place of the camera and flash. The problem that would result from the reversal of the camera with the WiFi/Bluetooth blocks is that even though the +1.2V power supply would still properly split to provide power to the blocks as needed, the GND return currents of the high frequency WiFi/Bluetooth would now flow directly through and under the microprocessor/memory blocks, thereby injecting the ripple currents and voltage bounces associated with the antennas directly into the high frequency microprocessor GND and memory transactions. This will result in errors with analogue-to-digital conversions of battery temperature, could corrupt the stereo quality to the speaker, impact the camera resolution, and cause memory errors that could lead to lost data. By comparison, as drawn, the WiFi/Bluetooth power and GND currents would remain separate and in parallel from the BUCK1.2V regulator to each independent load and back to the source (BUCK1.2V in this case), avoiding all of these issues.

Note that each of the above examples assumes a single GND, and they are drawn as a copper plane that is continuous and uninterrupted on one of the PCB layers. This GND plane is shared by all blocks of the circuit instead of partitioning the GND plane or separating it into sub-sections and using components to combine GND planes and control current paths. Intentional placement of blocks has been implemented because this method uses natural current flow to shield circuits from undesired GND bounce. Any trace that carries currents or voltages (positive potential) must have a return path. The return path will flow as close as possible to the positive potential form of the signal, and it will be distributed on the GND plane under the sourcing signal/power rail [1].

Understanding current flow and the concept of minimising current loops leads to the obvious conclusion that the single GND method is ideal and preferred as a PCB design approach because it significantly reduces component count, layer count, and potential radiation. Every trace and block will be provided the shortest return path possible on the PCB. By following this guidance, the system designer will only have to control the PCB design from the perspective of proper trace widths as well as smart placement of components and blocks. He or she should not have to check every trace or build multiple experimental boards to obtain the correct power, signal, and GND scheme. An additional advantage offered by single, uninterrupted GND plane is that the continuity of the plane allows heat developed to spread evenly across the entire PCB surface, resulting in lower operating temperatures.

Any signal (or power supply) used to drive any circuit must be given a proper path to return to its source. C circuit designers must consider the source and grounding schemes to properly implement a final system solution. Consideration of the load and the type of load is crucial during the implementation phase to keep current paths that cause voltage bounce controlled. Placing and locating those current paths in areas of the PCB that can afford GND noise without impacting performance is key to effective and efficient design.


References
[1] Ott, Henry. Partitioning and Layout of a Mixed-Signal PCB. Printed Circuit Design Magazine. 2001 June. Web. 2014 August 13.

[2] Spataro, Vincent. Counting squares: A method to quickly estimate PWB trace resistance . EDN Network. 2013 April 12. Web. 2014 September 03.


About the author
Nicholaus Smith is applications rngineer at Integrated Device Technology, Inc. with 11+ years of experience working on Analog, Digital, and Power Management circuits and Boards. He frequently designs and uses PCBs for consumer and industrial high volume production, engineering evaluation, customer demonstration, IC qualification and automatic test equipment.


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