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Comparing instruction set architectures: RISC vs CISC

03 Jul 2015  | Bernard Cole

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A recent study that compares the Intel X86, the ARM and MIPS CPUs has revealed that microarchitecture is more important than instruction set architecture, RISC or CISC. In fact, if you are one of the few hardware or software developers who still think that instruction set architectures, reduced (RISC) or complex (CISC), have any remarkable effect on the power, energy or performance of your processor-based designs, then you're in for a big surprise.

Ain't true. What is more important is the processor microarchitecture, the way those instructions are hardwired into the processor and what has been added to help them achieve a specific goal.

This is the over-arching conclusion of a study recently published in the ACM Transactions on Computer Systems. In the paper, "ISA Wars: Understanding the Relevance of ISA being CISC or RISC," authors Emily Blem, Jakrishnan Menon, Thiruvengadam Vijayaraghavan and Karthhikeyan Sankaralingam, report the results of a study over the last four years or so by the University of Wisconsin (Maidison) Vertical Research Group(VRG).

Platforms used in RISC vs CISC ISA study

Platforms used in RISC vs CISC ISA study

Vijayaraghavan, associate professor, computer sciences, electrical and computer engineering at UMM, said the study is the most comprehensive analysis to date on all aspects of the design and implementation of three major architectures: Intel's x86, the ARM architecture and Imagination Technology's MIPS CPU.

"While there may have been differences in the past between RISC and CISC ISAs in current architectures, there certainly aren't now in terms of the parameters we focused on: performance, power and energy," Sankaralingam said. "Where the ISA is lacking, the microarchitecture is enhanced to make up for it, and vice versa."

He said that that there is only one true RISC architecture out there, Imagination's MIPS, which is based on the architecture developed by researchers from Stanford University. The X86 was originally a pure CISC design, but over the years has taken on a much more RISC-like structure while ARM's roughly RISC architecture has taken on more CISC features, including the addition of the Thumb 1 and Thumb 2 ISAs.

"So basically what it comes down to is comparing today's implementations of the processors from Intel, ARM and Imagination in today's market environment. And by almost every measure we used, even there ISA is irrelevant."

Because previous studies were handicapped by comparisons between systems with varying hardware and software resources, Sankaralingam said the VRG team worked hard to make sure measurements were made on roughly equivalent platforms and in roughly comparable environments. To separate out implementation and ISA effects, where possible they used multiple chips for each ISA with similar microarchitectures.

This study confined its comparisons to those implementations of the Cortex-A8 or higher, with little focus on any of the Cortex-M devices. "The reason for this is simple: one of our goals was to have platforms we could compare and quantify," he said. "There is no way to do that below the A9, in terms of competitive architectures." In the Cortex-M0 environment, where ARM is competing with 8bit MCUs over the 1MHz to 20MHz and 2mW to 50mW range, the operating overheads of the X86 instruction set makes that untenable.

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