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Isolated clock source functions as test generator

18 Jan 2016  | Daniele Danieli

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Circuits such as PLL synthesisers, high-dynamic-range ADCs, and timing-sensitive digital networks call for stable and spurious-free clocks. Testing these circuits is a difficult task when you use a master oscillator, even if the signal theoretically matches the application's phase noise and spurious responses. Variable clock-line loads, typical conditions in circuits under functional evaluation, and power-supply-line interferences, again typical in open-board environments on lab desktops, can degrade signal purity with jitter or unpredictable phase steps.

You can insulate an oscillator from a load requiring a special high reverse-attenuation-buffer stage, but it is more difficult to implement this insulation at frequencies of 10MHz and more. This Design Idea describes a cost-effective approach to implementing an isolated clock source using a high-speed optocoupler with low input-to-output capacitance.

The circuit uses a quartz-oscillator stage with two NPN transistors in a conventional scheme (figure). You select components C3 and C4 relative to the frequency; for 15- to 30MHz frequencies, the corresponding values are 220 and 100 pF, respectively. You can scale up these values for lower frequencies. You can also substitute this stage with other equivalent circuits. A level-shift follower uses PNP transistor Q3; a TTL-compatible signal at the output is available. You select resistor R7 for the best pulse response; a value of 22Ω is adequate for most applications; however, you can omit the resistor if necessary.


Figure: This circuit provides a cost-effective approach to implementing an isolated clock source using a high-speed optocoupler with low input-to-output capacitance.


You now apply a logic-level signal to the input pin of a high-speed CMOS optocoupler, IC2. This design uses an HCLP-7101 type that operates at frequencies as high as 40MHz, but new devices, such as the HCPL-77xx in SMD packages, are fully compatible. These optocouplers have input-to-output capacitance of less than 1 pF, and they have separate supply pins. If you do not use common grounds, as in the figure, you establish an optimised ultra low-power coupling, which provides effective isolation from load conditions and electromagnetic interference (EMI) that otherwise might modulate the incoming signal.

Note that the left side of the circuit, comprising an oscillator and the input half of the optocoupler, uses a dedicated battery to obtain the 5V supply voltage. On the right side, comprising the output half of the optocoupler, all lines directly connect to the board under test with relatively long cables; thus, they cause no disadvantages in the oscillator stage. You can use any optocoupler of adequate bandwidth as long as you pay attention to the correct power-supply voltage and the logic-level compatibility of IC2.


About the author
Daniele Danieli contributed this article.


This article is a Design Idea selected for re-publication by the editors. It was first published on March 19, 2009 in EDN.com.




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