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Weighing in on chip stack for CMOS image sensors

01 Feb 2016  | Junko Yoshida

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Among the seemingly countless features that today's smartphones seem to offer, nothing stands out more than the camera. As camera functions become essential to differentiate embedded devices, designers of CMOS image sensors (CIS) find themselves struggling with growing demands on multiple fronts: image quality, size of camera modules and overall cost.

Over the last few years, CIS vendors have embraced chip stacking. Under that option, a CIS is stacked with an image signal processor (ISP). As the next step, at least two major players, Sony and Samsung, are reportedly pondering the use of FD-SOI wafers in manufacturing ISPs for a chip stacked CIS.

At the recent FD-SOI Forum in Tokyo, several participants privately discussed CIS as a volume product opportunity for FD-SOI.

Aside from Sony, Samsung is taking a hard look at using FD-SOI for CIS, as shown in one of the slides presented by Yongjoo Jeon, system foundry director at Samsung Electronics at the Forum.

FD-SOI for CIS

Samsung takes hard look at using FD-SOI for CIS (Source: Samsung)

Before stampeding to FD-SOI for CIS, though, a few key questions need to be answered. 1) How big is the CIS market for image sensor suppliers who might opt to use of FD-SOI in their chip stacked CIS?; 2) What is the real advantage of chip stacking in CIS?; and 3) Why is FD-SOI better than bulk CMOS when designing ISP for chip stacked CIS?

We asked Yole Developpement, a market research firm, to help us break it down.

CMOS image sensor market

According to Yole, CIS is "a $10 billion market in 2015, growing 12 per cent YoY."

Noting that it's "still growing faster than the semiconductor industry," Yole's spokesperson said, "Our five year forecast shows 10.6 per cent CAGR." This is after taking into account the slowdown of smartphones and increasing value of rear/front facing cameras.

But then, which CIS suppliers are doing chip stacked CIS?

Yole estimated that in 2015, 27 per cent of CIS revenues were generated from stacked chips, which the firm described as "roughly the market share of Sony."

Camera module industry

Growing camera module industry (Source: Yole Development)

Why chip stacking?

Pierre Cambou, activity leader, Imaging & Sensors at Yole, observed that the competition in CIS revolves around two key parameters: image quality and the size of the camera module.

He described the high quality camera as "a key element of the smartphone." It led to the pixel count race, from 3MP to 5MP, then 8MP, 12MP, 16MP and now 20Mp.

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