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Flexible Hopfield neural-network ADCs eliminate noise

18 Apr 2016  | Paul Rose

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Figure 1 shows a 4bit neural ADC employing voltage inverters that comparators feed. The comparators connect with their positive terminals joined to input nodes and with their negative terminals grounded. The bases of this network are inverse factors of one-half—that is, reciprocal factors of two—input-node conductances SIJ=–1×2(2–I–J), where the –1 factor comes from negative feedback through the related resistor; SIR=2(1–2×I); and SIS=2(1–I). To determine node resistances, choose a maximum node resistance of 1000Ω corresponding to a minimum conductance of 0.0078125, and a minimum node resistance of 7.8125Ω corresponding to a maximum conductance of one. Calculate all other resistances from the ratios between the extremes of conductances. Using these values, you can construct the table. The table lists bits ranging from the most significant bit to the least significant. The table shows that the digitisation process is inaccurate in that it is not linear with input voltage and with many intermediate bit words missing. But the process is precise because it is repeatable over sizable input-voltage ranges. From the table, you can derive the following curve-fitting equation: Y=1–1.6243×(1–X)3.1508. When X is over the normalized range of 0.1427 to 1, A=1.6243, B=0.1427, and C=3.1508. The Y equation is essentially cubic, and it quantitatively shows the highly non-linear nature of the digitisation process. You can obtain a "flipped" mirror—that is, not a true mirror, or pseudoscopic—version of the curve of the straight line on a normalized graph by reversing the bit-order readout from the circuit so that the resulting curve equation would be: Y=1.6243×(X–0.1427)3.1508.


Table: Input voltage versus output word.


Without analogue-input-voltage transformation, such as the use of look-up tables or logarithmic amplifiers to process the input voltage, or digital corrective logic, digital responses from simple Hopfield neural converters are non-linear and crude. However, these responses are still possibly useful for such applications as associative memory and pattern classification because of robustness in output precision.

Indeed, because of output digital stability, the Hopfield neural converter can allow for unwanted analogue-input-signal noisiness or variations. This scenario is in strong contrast to conventional interface circuits between analogue-transmission media and digital-computing machines. This Design Idea shows that flexible circuit adaptability can exist in producing various forms of stable digital outputs from neural ADCs depending on a designer's needs for neural-network-signal processing. This adaptability can be in the forms of various input-node-conductance layouts; comparator/inverter and comparator/follower combinations; and the selected order of bit-readout patterns from the comparators.


About the author
Paul Rose contributed this article.


This article is a Design Idea selected for re-publication by the editors. It was first published on January 24, 2008 in EDN.com.


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