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Adaptive rotary encoder discerns fine from coarse

02 Jul 2013  | Anthony Smith

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Similar in size and shape to the common panel-mounted potentiometer, the incremental rotary encoder offers an inexpensive 'digital' alternative to the analogue potentiometer. It is typically used to apply level control, tuning, and timer settings in AV equipment, environmental controls, consumer appliances, laboratory equipment, scientific instrumentation, and so on.

The outputs of an incremental encoder typically consist of two signals in phase quadrature (i.e., phase shifted by a quarter period) which produce a fixed number of pulses per shaft revolution, each pulse corresponding to an increment of rotation. Internally, the encoder has two switches connected to a common terminal. This terminal is usually connected to ground as shown in figure 1, and the two quadrature outputs are connected to pull-up resistors (R1 and R2).

Figure 1: Adaptive interface circuit responds to rapid rotation of the encoder and increases the output pulse rate accordingly.

The circuit in the shaded section of figure 1 represents a typical encoder interface that implements quadrature decoding. Here, R3-C1 and R4-C2 provide noise filtering and contact debouncing, with Schmitt NANDs IC1a and IC1b generating 'squared up' digital signals at points A and B. Like the encoder outputs, these signals are 90 degrees out of phase: when the encoder is rotated clockwise, the rising edge of signal A leads the rising edge of signal B by a quarter period; when it turns counterclockwise, signal B leads A by a quarter period.

By feeding signal A to the D input of flip-flop IC2a, and by clocking the flip-flop on the rising edge of signal B, the output signal at Q will be high when the encoder is rotated clockwise, and low when it turns counterclockwise, thereby indicating the direction of rotation. Either of the signals A or B may be used as the incremental pulse. For example, if the encoder is a 20 increment type, the signal at A or B will generate 20 pulses for each 360 degree revolution of the shaft.

The simple interface circuit works fine in applications where only a few encoder rotations are likely at any one time. However, it is completely inadequate for cases requiring hundreds or even thousands of incremental pulses. For example, consider an application that requires 1000 pulses to be clocked into a counter. The 20 increment encoder would need to be rotated fifty times to generate that many pulses, a time consuming and finger-aching task!

However, by adding just one more integrated circuit (IC3, a dual retriggerable monostable multi-vibrator) and a handful of inexpensive components, the circuit can be made to recognise when the encoder is being rotated quickly in order to generate multiple output pulses for each incremental pulse at signal B. The additional circuitry is shown outside the shaded area and works as follows:

Monostable multi-vibrator IC3a and flip-flop IC2b form a simple rate detector which monitors the frequency of the signal at B. Faster rotation of the encoder increases the signal's frequency and decreases its period. The rate detector senses when the signal period has fallen below a threshold set by the monostable's timing components, R5 and C3.

The second monostable, IC3b, is configured to act as an astable by the addition of R6, C4 and Q1. The timing components R6-C4 and R8-C5 determine the frequency and duty-cycle of the astable's output signal taken from pin 12.

The first monostable, IC3a, is configured to trigger on B's falling edge, whereas flip-flop IC2b is clocked on B's rising edge. When the encoder is rotated relatively slowly, the signal at IC3a's Q output (pin 13) consists of a train of positive-going pulses. The pulse width is given by:

t(w) = 0.45 × R5 × C3 (seconds) (Vcc = 5V)

With R5 = 560kΩ and C3 = 100nF, t(w) is nominally 25ms. When the encoder is rotated slowly, signal B's frequency is low, its period is relatively long and (after being clocked by signal B's falling edge) the signal at IC3a's Q output has returned to a low level before signal B goes high again. Now, since Q drives IC2b's /RESET input, signal B's positive-going transition at the flip-flop's clock input (pin 11) has no effect on the outputs and Q (pin 9) remains low. This, in turn, sets IC3b's /RESET input low (at pin 11) and thereby holds the astable formed around IC3b in a reset state, such that its /Q output (at pin 12) is high. The overall result is that the 25ms pulses at IC3a's Q output are gated through IC1d and further inverted by IC1c such that the circuit output consists of a series of constant-width, positive-going pulses, each one corresponding to an incremental turn of the encoder. Therefore, when the encoder is rotated slowly, the circuit produces just one 25ms output pulse per increment.

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