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Agilent rolls 28.4Gb/s multiplexer with de-emphasis option

18 Jul 2013

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Agilent Technologies has debuted a 28.4Gb/s multiplexer with optional de-emphasis. The device comes with up to eight taps to characterise receivers for next-generation servers, storage systems and data-centre networks. The multiplexer also expands the pattern generator bit rate of the J-BERT N4903B high-performance bit error ratio tester.

The M8061A 28.4Gb/s multiplexer with optional de-emphasis delivers the accurate and repeatable receiver characterisation results using the built-in eight-tap de-emphasis, allowing engineers to emulate transmitter de-emphasis and channels and compensate losses in the test setup. The M8061A is transparent to jitter from J-BERT and provides additional clock/2 jitter injection capabilities. The unique, built-in superposition of level interference eliminates the need for external power splitters that can cause level and signal degradations.

The M8061A allows engineers to characterise next-generation computing buses operating above 14 Gb/s and data-centre I/Os. When engineers use the M8061A with J-BERT N4903B, they can generate loopback training sequences. The M8061A's DC-coupled output allows engineers to generate unbalanced bit patterns without level drift, and it can be switched to an electrical idle state for computer bus receiver tests such as those required for PCI Express(r).

The 28Gb/s multiplexer with de-emphasis option can be added to an existing J-BERT test setup to allow 28Gb/s measurements with minimal investment. The equipment can be used to test multiple-gigabit test applications, such as PCIe(r), USB, SATA, QPI, Hypertransport, Thunderbolt, DisplayPort, SD UHS-II, MIPI(tm) M-PHY, backplanes, 10-Gb Ethernet and 100-Gb Ethernet, SFP+ and CFP2 interfaces.

Further information regarding the M8061A 28.4Gb/s multiplexer with optional de-emphasis can be found here.

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