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Design optimisation kit speeds time-to-market

26 Jul 2013

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Imagination Technologies has unleashed its Design Optimisation Kits (DOKs) that the company said give customers the flexibility to optimise for power, performance and area (PPA) in its GPUs, CPUs and other IP core families. The DOKs include optimised reference design flows, tuned libraries from partners, characterisation data and documentation.

The first Imagination DOK, which will be available later this year, enables customers using Imagination's PowerVR Series6 'Rogue' GPUs to significantly accelerate time-to-market and reduce power and area through a package of core IP and physical IP co-developed by Imagination and Synopsys. Using the DOK, which includes Synopsys' DesignWare High Performance Core (HPC) Design Kit, customers leveraging PowerVR Series6 GPUs from Imagination can achieve up to a 25 per cent reduction in dynamic power and up to 10% area savings, as well as up to 30% improvement in implementation turnaround time through a tuned design flow, detailed the company.

PowerVR GPU cores claim to offer best-in-class performance per mm2, while consuming only a fraction of the power of competitive solutions. With the validated DOK, customers have the flexibility to optimise the implementation even further, targeting an ideal balance of performance, power and area for their specific application.

The collaboration between Synopsys and Imagination to develop DOKs using Synopsys' HPC Design Kit focuses initially on PowerVR GPUs and MIPS CPUs, with plans to extend across other key members of Imagination's IP portfolio including video and vision processors, and radio communications processors.

The Design Optimisation Kit for Imagination's PowerVR Series6 IP cores, including an optimised reference flow, floorplan and Synopsys' DesignWare HPC Design Kit, will be available in Q3.

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