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JESD204B integrates FPGAs, SoCs with data converters

27 Jan 2014

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Altera has made available its range of JESD204B solutions, which are designed to facilitate integration of Altera FPGAs and SoCs and data converters in systems using the JEDEC JESD204B standard. JESD204B is a high-speed serial interface standard that simplifies circuit board design when interoperating FPGAs with analogue-to-digital converters (ADCs) and digital-to-analogue converters (DACs). The company says its clients can initiate the development of JESD204B serial interfaces by using its online resource centre.

The interface standard is used across many applications, including radar, wireless radioheads, medical imaging equipment, software defined radios, and industrial applications. Altera's JESD204B solutions include intellectual property (IP) cores, reference designs, development boards, and interoperability reports for the industry's latest data converters. This comprehensive collection of JESD204B resources is available through an online resource centre that enables users to jumpstart the development of JESD204B-based serial interfaces, while giving designers the flexibility to select the FPGAs and data converters that best meet their systems' power and performance requirements.

Altera has validated device interoperability with leading data converter suppliers, including Analog Devices and Texas Instruments (TI), and is actively working to expand its offering by validating interoperability with many other data converter companies. Altera offers JESD204B solutions that support its latest 28nm products, including Stratix V FPGAs; mid-range Arria V FPGAs and SoCs; and low-power, low-cost Cyclone V FPGAs and SoCs.

"Our close collaboration with industry-leading partners enables us to deliver the most comprehensive JESD204B offering in the FPGA industry," said Alex Grbic, director of software and IP product marketing at Altera. "Providing validated device interoperability reports, proven IP, and multiple reference designs and development kits allow customers to quickly evaluate and integrate a JESD204B-based serial interface into their designs."

Altera says it is the only FPGA vendor to provide JESD204B IP that includes the physical layer, data link layer, and transport layer implementations from a single source. The IP conforms to the latest JESD204B standard for operation up to 12.5Gbit/s.

Altera features a JESD204B resource centre on its web site that simplifies the evaluation and selection of data converters from vendors. Through this resource centre, customers can find out more information about Altera's JESD204B solutions, download and evaluate JESD204B IP, view device interoperability reports and characterisation reports, and download reference designs. Demonstration videos are also available for viewing within the Altera JESD204B resource centre that detail the set up and hardware used in several systems. Altera offers free technical training modules that can help designers familiarise themselves with Altera's serial IOs and related software tools.

Altera's JESD204B solutions, including fully tested and proven IP, reference designs, and development kits, are available today. The JESD204B IP is available for download and free evaluation. For additional information and pricing, readers should contact a local Altera sales representative.

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