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Imagination launches imaging processor IP core

27 Feb 2014

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Imagination Technologies introduces the first intellectual property (IP) core based on its innovative PowerVR Raptor imaging processor architecture. The PowerVR Series2 V2500 core offers a scalable and configurable solution targeting a broad range of devices from feature phones, automotive and connected home security to smartphones and tablets.

The V2500 core joins the broad line of Imagination's PowerVR multimedia cores, including the new PowerVR Series6XT graphics processors and PowerVR Series5 video and still image encoders and decoders, to form an integrated vision platform that saves power and bandwidth for camera applications. This can provide the basis for next-generation context-aware applications such as facial and gesture recognition, augmented reality and more.

The V2500 core is the first imaging processor IP core designed to operate as a cooperative part of a heterogeneous computing platform for advanced functions and next-generation applications. Close connections between the V2500 and other SoC resources can enable full support of 4K Ultra HD video and high pixel count photography in mobile devices and tablets.

Able to work with any video encoder, the V2500 is specially optimised for integration with Imagination's PowerVR Series5 and previous generation video encoders, featuring a dedicated encoder processing path, direct Zero Memory output to the encoder, and the ability to output image statistics and metadata for encode quality and real-time bitrate control. This results in lower power, lower bandwidth, lower latency and higher performance.

The V2500 core provides the features and functionality needed for optimal integration of modern CMOS camera sensors, with full support for sensors from all major vendors. The V2500 core simultaneously supports multiple sensors with fast context switching, enabling stereo, multi-cam and vision array support for volumetric imaging—all with a single imaging processor. Contexts are expandable to enable multiple stereo cameras. On a phone or tablet, this enables front and rear cameras to be routed through the single IP core, and encoded and displayed simultaneously.

The advanced processing pipelines of the V2500 from CMOS sensor to RGB and YUV offer the highest quality images possible with minimal noise. This includes comprehensive 1D and 2D image processing pipelines, image enhancement pipeline with a full local tonemapper for enhanced dynamic range, display processing pipeline and encoder processing pipeline. With the V2500 core, the pixel depth of the pipeline can be configured to match the sensor, conserving power compared to DSPs with fixed datapath widths.

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