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Xilinx unveils UltraScale MPSoC architecture

03 Mar 2014

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Xilinx Inc. introduced the UltraScale Multi-Processing (MP) architecture for Zynq UltraScale MPSoCs at Embedded World 2014. Building on the industry success of the Zynq-7000 All Programmable SoCs, the UltraScale MPSoC architecture extends Xilinx's ASIC-class UltraScale FPGA and 3D IC architecture to enable heterogeneous multi-processing with "the right engines for the right tasks."

This All Programmable MPSoC architecture provides processor scalability from 32bits to 64bits with support for virtualisation, the combination of soft and hard engines for real time control and graphics/video processing, waveform and packet processing, next generation coherent interconnect and memory, advanced power management, and technology enhancements.

The UltraScale MPSoC architecture enables breakthroughs in system performance and integration at lower system power by combining heterogeneous multi-processing with the fastest FinFETs in the industry, leveraging TSMC's 16nm FinFET process.

These architectural elements are coupled with the Vivado Design Suite and abstract design environments to simplify programming and increase productivity. This includes C, C++ and OpenCL-based design abstractions, third party system level abstractions from Mathworks and National Instruments, and IP-based design abstractions and automation.

These environments enable easy software migration from the de facto standard 28nm Zynq-7000 All Programmable SoCs. The new MPSoC architecture will be supported by the expanding ecosystem of SW, Middleware, OS support, Debuggers, IP tools, boards and design services for Zynq devices.

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