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Micron patent reminiscent of IBM's latent image memory

13 Mar 2014  | Ron Neale

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The next step shows what happens after the power is again ramped up, and the memory is operated with the other arm of the SRAM mostly in its conducting state. The two resistors both change values. But when power is removed, the latent image of the memory cell has changed and will be observed on the next power ramp up. Following that is a sequence with power down and another temperature change back to the original starting temperature.

If, with temperature and time the resistance of the amorphous material starts to reduce due to crystallization, then a similar argument can be made for the operation of the LLi-SRAM. If the crystallization is due to the effect of elevated temperature of the environment in which the complete array exists, then the rate of change for the two hybrid resistors will be the same. If the crystallization is from thermal or other effects of current flowing through the resistors, then the rate of change will be different and the LLi-SRAM cell will operate in the same manner and create a latent image, as it did for drift.

The LLi-SRAM idea is possibly a flight of fancy. However, as suggested earlier, it might be possible to move away from chalcogenides to other materials where interacting surface effect between any two resistance materials in contact can result in larger resistance changes when current flows through the combination. It might be possible to find suitable materials or other NV memory types that use switching mechanisms different from PCM, where the resistance changes occur as a result of current flow. The Micron patent uses two variable resistance PCM devices to establish the latent image, which means that a single set or reset pulse applied to each device will ensure a resistance difference sufficient between the two to ensure the intended latent image is written. It would also appear that if an iterative write/erase was to be employed, the SRAM could be designed with just one PCM.

The earlier latent image work at IBM demonstrated that only the very smallest of differences in resistance between the two arms of a SRAM cell that occur in even the best fabrication process are all that is necessary to determine the logic state of the latent image. With relatively small differences, as would be the case with the LLi-SRAM design described earlier, some serious simulation work should quickly determine the minimum resistance changes that are acceptable to achieve latent image operation.

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