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Finding faults with cross-corner testing

14 Apr 2014  | Pallavi Raj , Archana Tripathi, Amresh Kumar

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The cross-corner test case scope could be vast, including single and multi-core, single interface, and multiple interfaces working concurrently. Test case scope, process corners, temperatures, frequency, voltages to be targeted and guard bands for each is based on process understanding and design team sign-off.

Pass/fail conditions
In figure 2, P indicates a pass point and F indicates a fail point. The shmoo algorithm starts at a point in the passing region (left most point of the plot) runs the test case, then moves to the next frequency and runs the test case again. This is repeated utill a fail point is encountered. The steps repeat for all specified voltages.

Figure 2: A shmoo plot identifies pass and fail conditions.

Infrastructure and test cases
For PVTF testing, the setup we use has automated control for voltage, frequency, and temperature. During the planning phase of board design based on testing requirements, we decided which input voltages and frequency controls we needed to provide.

Figure 3: A host computer controls a validation board and collects test data.

Figure 3 shows how a remote session running on a host computer can access and configure the settings that let us modify the voltage, and frequency, and monitor the temperature. A Freescale proprietary card converts Ethernet to PCIe and I²C. The host computer includes interface hardware and software as needed to manage the setup and execution of test case.

For each step on the shmoo plot, the host computer monitors the voltage, frequency, and temperature. For process variation, we manually connect an SoC from each process corner needs to the board socket.

Test cases that we run are speed hunted, exercising maximum logic, use-case scenario, proof point applications (applications that demonstrate the functionality and performance of hardware) and even BIST (built-in self test). For a particular shmoo plot, once the testcase is selected, the exact same test case is run at each point. This eliminates the effect of test-case changes. Once the test case is fixed, any pass-fail variation is a result of frequency, voltage, temperature, or process variations. Some of the relevant test cases from a validation cross-corner testing suite can be converted to tester format for running on the tester. The paper Bridging Validation and Automatic Test Equipment (ATE) Environment discusses this methodology.

Using scripts, we extract test results from the logs and display them in form of line plots, shmoo plots, or other readable formats.

Figure 4 shows the shmoo plot of one of the high speed interface for fast/fast (FF), nominal (NN) and slow/slow (SS) silicon. This plot helps us to understand and compare the behaviour across different process corners for voltage vs. frequency response. The process impact on voltage verses frequency (FMAX) response of the interface in question is as expected. For any particular voltage, silicon is slower on slow/slow corners and faster on the fast/fast corners. Detailed information on process corners can be found at Understanding Process Corners. We can also obtain an FMAX versus voltage curve, which lets us compare multiple temperatures and processes or multiple interfaces in the same plot.

Figure 4: These shmoo plots show where a device passes tests based on process variables.

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