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Google smartphones to employ Lattice ECP5 FPGAs

17 Apr 2014  | Max Maxfield

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Lattice Semiconductor recently introduced its ECP5 FPGAs, designed from the ground up for high-volume deployment. After the company surveyed the market and talked to customers, Lattice opted for low cost over increased capacity, low power over high performance and high functional density over larger packages.

One indication that Lattice has honed in on a great strategy is the announcement that Google will use Latice's ECP3 and ECP5 FPGAs in its Project ARA modular phones.

Typically, when you purchase a smartphone, you pretty much get whichever collection of functions and features the manufacturer decides to stick in there. This is limiting in so many ways. If any feature on your smartphone (the camera, for example) fails for any reason, your only realistic recourse is to purchase a new phone. The same thing applies if a better version of a function (like a higher-resolution camera) becomes available, or if a completely new capability takes the market by storm.

As a result, the human race is currently designing, building and scrapping smartphones at a mind-boggling rate. Project ARA aims to get around this by providing an open hardware platform for creating highly modular smartphones. Such a platform will include a structural frame into which users can plug modules of their choice, such as a keyboard, a display or an extra battery.

Project ARA

Source: Google ATAP

Using this modular approach, users will be able to replace broken modules quickly, easily and affordably. Also, they will be able to add features and capabilities as new technology modules emerge.

Module connectivity will be achieved using the MIPI UniPro (Unified Protocol) network protocol. This application-agnostic scalable layered protocol lets devices and components exchange data at high rates with low pin count and low power consumption.

Lattice's ECP3 and ECP5 FPGAs provide the I/O performance and flexibility required to meet the evolving MIPI Unipro interfaces standard, so they will be used to implement the advanced communication linkage between modules. These small-footprint, low-power FPGAs can also be used to implement whatever functionality developers desire—such as processing sensor and image data—without the cost and delays associated with developing a special ASIC or the high power consumption associated with using an applications processor.

Project ARA developers can start developing their modules immediately using the Project ARA MDK.

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