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I2C serial bus skips programming

06 May 2014

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Digital Core Design's (DCD) DI2CSB IP core is a two-wire, bidirectional serial bus, which provides stable and efficient short distance data transmission between numerous devices. A very simple interface composed of read, write and data signals allows easy connection to target device. The DI2CSB is a technology independent design, that's why it can be implemented in a variety of both ASIC and FPGA technologies.

DCD enhanced its portfolio with a new architecture. The DI2CSB provides an interface between a passive target device—such as memory, LCD display, and pressure sensors—and an I2C bus.

"It can work as a slave receiver or as a transmitter depending on the working mode determined by the master device," says Piotr Kandora, DCD's Member of the Board. "A clever interface, composed with read, write and data signals, allows easy connection to target devices. The core does not require any programming and is ready to work after power up/reset. The read, write, burst read, burst write and repeated start transmissions are automatically recognised by the core."

"The DI2CSB core incorporates all features required by the I2C specification," adds Kandora. "That's why it supports Standard, Fast, Fast Plus and High Speed transmission modes."

The DI2CSB can be easily customised in accordance to a project's needs. For instance, the DI2CSB can be found in embedded microprocessor boards, consumer and professional audio/video, home and automotive radio, low-power applications, communication systems, cost-effective reliable automotive systems, and many others.

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