Path: EDN Asia >> Design Centre >> Test & Measurement >> Considerations when designing testability into a PCB
Test & Measurement Share print

Considerations when designing testability into a PCB

15 Sep 2014  | Jason Frels

Share this page with your friends

One thing I try to make myself consider when designing a PCB, particularly during layout, is what features I can incorporate for testing – both for bench testing in R&D as well as during manufacturing test. I try to consider what I could do to speed up validation testing or enable me to better deal with components that were difficult to test in the past. Also, perhaps design in some "undocumented" features to try out some new ideas – board-space and time-permitting, of course.

Test points
If your design gets in-circuit testing (ICT), you will have test-points for the fixture. You will probably try to arrange these to minimise any signal integrity issues. But you can also arrange them to make your design easier to probe. For instance, I have aligned them for a differential probe tip at the interesting end of the signal trace. Or, by adding ground and power test-points in strategic places where I know I'll be probing a lot.

I put on lots of headers that never make it onto the final bill of materials. I always put in headers for my main voltage rails, just to have an easy place to stick a DMM or connect a cable for chamber testing, etc. Also, any time I have a JTAG port on programmable logic, I put on a header that will match our programmer. I2C busses can tolerate some SI sloppiness, so I put headers on them. Unused I/O from a CPLD, FPGA, or microcontroller can be routed to a header for debugging or later experimentation.

I put LEDs wherever I can make them useful. For instance, a DONE signal on a power supply sequencer, to quickly let me know that the thing powered up. Or debug LEDs on FPGAs, microcontrollers, etc., which I can use to debug code issues. They can be stripped off the BOM later, but are really nice when you have a prototype that may not be quite ready for prime-time, so you can quickly see what is happening with it. And, they really look neato.

Test traces
If there is room, you might just lay out traces that mimic other sensitive traces, so you can experiment with them. Put test-points or connectors on them to connect to scopes, TDRs, signal-generators, etc., so that you can see what your other signals potentially look like. Or, if you have spare clock outputs, run one to a connector; it might be useful for triggering or syncing during testing. I have done this purely for educational reasons when studying crosstalk or other signal integrity issues.

Undocumented features
Perhaps, if you have room and time, you might even design and place an entire experimental circuit or extra function that you don't intend to ship. It might allow you to test out a new idea. I did this once to experiment with some minimum loadings for a power supply. Or it might allow you to have better access for debugging, like a USB port for your embedded device. This does take up board space and design time, though.

I have done lots of other miscellaneous things too, like optional termination schemes, current-sense resistors, trim-pots, terminals for on-board power supplies, etc.

What PCB test tricks and techniques have you employed in your designs?

About the author
Jason Frels is an electrical design engineer.

To download the PDF version of this article, click here.

Want to more of this to be delivered to you for FREE?

Subscribe to EDN Asia alerts and receive the latest design ideas and product news in your inbox.

Got to make sure you're not a robot. Please enter the code displayed on the right.

Time to activate your subscription - it's easy!

We have sent an activate request to your registerd e-email. Simply click on the link to activate your subscription.

We're doing this to protect your privacy and ensure you successfully receive your e-mail alerts.

Add New Comment
Visitor (To avoid code verification, simply login or register with us. It is fast and free!)
*Verify code:
Tech Impact

Regional Roundup
Control this smart glass with the blink of an eye
K-Glass 2 detects users' eye movements to point the cursor to recognise computer icons or objects in the Internet, and uses winks for commands. The researchers call this interface the "i-Mouse."

GlobalFoundries extends grants to Singapore students
ARM, Tencent Games team up to improve mobile gaming

News | Products | Design Features | Regional Roundup | Tech Impact