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Design suite boosts productivity for Zynq-7000 SoCs

10 Oct 2014

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Xilinx Inc. revealed significant improvements in terms of productivity for Zynq-7000 All Programmable SoCs with the Vivado Design Suite 2014.3, According to the company, the Vivado Design Suite 2014.3 is the programmable industry's only SoC-strength design suite, accompanied by an SDK and UltraFast Embedded Design Methodology Guide.

The latest update includes additional features in Vivado High-Level Synthesis (HLS) and IP Integrator, and novel performance monitoring and visualisation capabilities within SDK. When used together with the UltraFast Embedded Design Methodology Guide, the enhancements are seen to expedite productivity by more than ten-fold, Xilinx stated.

Enhancements to Vivado HLS include improved quality-of-results from C based synthesis and enhancements to its automatic inference of AMBA AXI-4 interfaces to speed the time and quality of integration. Vivado HLS enables IP creation and verification directly from C algorithmic specifications, quickly resulting in designs that rival hand-coded RTL and verification several orders of magnitude faster than RTL simulation. Leveraged by over 1,000 designers, Vivado HLS also supports a growing ecosystem of hardware implementable SW libraries. The enhanced Vivado Design Suite 2014.3 supports over 40 OpenCV functions, available from Xilinx Technology Ventures portfolio company and Alliance Member Auviz Systems.

Enhancements in Vivado IP Integrator include automation of the connectivity between streaming and memory mapped AXI interconnects, expediting and simplifying integration of IP into Zynq SoC-based systems. Also included in Vivado IP Integrator is a push-button IP evaluation request for Xilinx Premier Alliance Member IP. The 2014.3 also features Xylon logicBRICKS evaluation IP cores, with other Alliance member IP to be added in future releases. The logicBRICKS IP claims to speed up the evaluation of efficient image and video processing IP, further expanding the Vivado IP Catalogue, noted the company.

Xilinx has also extended its software development kit (SDK) with live in-system instrumentation and performance visualisation to quickly find system performance bottlenecks and run what-if scenarios. Xilinx SDK 2014.3 provides configurable AXI traffic generators that work on the FPGA fabric to enable developing embedded software earlier in the development cycle.

To complement the UltraFast Design Methodology for Vivado, Xilinx also unleashed the UltraFast Embedded Design Methodology Guide (UG1046) that provides design teams (system architects, software engineers and hardware designers) with best practices for predictable success and accelerated productivity for their embedded systems leveraging the Zynq All Programmable SoCs.

The Vivado Design Suite 2014.3 is available with support for Xilinx's 7 series, Zynq All Programmable SoCs and UltraScale devices.

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