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Microprocessor architecture boosts performance-per-watt scaling

27 Oct 2014

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Soft Machines Inc. has unleashed the Soft Machines VISC architecture that the company said is a breakthrough in microprocessor performance-per-watt scaling and promises to enhance performance and power for all segments of the computing ecosystem. According to Soft Machines, the VISC architecture has been developed in response to single-core frequency and power-scaling issues and multi-core programming challenges.

The VISC architecture is based on the concept of "virtual cores" and "virtual hardware threads." This approach enables dynamic allocation and sharing of resources across cores. Microprocessors based on CISC and RISC architectures make use of "physical cores" and "software threads," an approach that has been technologically and economically hamstrung by transistor utilisation, frequency and power-scaling limitations. The VISC architecture achieves 3-4 times more instructions per cycle (IPC), resulting in 2-4 times higher performance per watt on single- and multi-threaded applications. Moreover, VISC uses a light-weight "virtual software layer" that makes VISC architecture applicable to existing as well as innovative software ecosystems.

VISC architecture

The VISC architecture scales by changing the number of virtual cores and virtual threads. This approach provides a single architecture capable of addressing the needs of applications spanning from the Internet of Things (IoT), to mobile and to data centre markets.

The company has also demonstrated a dual virtual core VISC SoC prototype, showcasing the IPC improvement.

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