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ADC pipeline hardware for multi ADC sampling

08 Jan 2015  | Kumar Abhishek, Snehal Rathi, Garima Jain

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With the world today acknowledging increased safety concerns, automobile technology is trying to match pace by methods which we commonly refer to as "active safety". The active safety measures are becoming more precise by the day and the sub-systems involved are becoming much more complicated. Today active safety is increasingly being used to describe systems that use an understanding of the state of the vehicle to both avoid and minimise the effects of a crash, an active safety system being the one which is activated in response to any such situation. These systems are popularly known as Advanced Driver Assistance systems (ADAS).

Anything and everything which has to provide a driver safety on the go needs to be aware of its own surroundings. This implies that an ADAS system will in effect collect information from its surroundings and then depending on the occurrence or on the probability of occurrence of certain events like a collision/ crash etc. warn the driver about the same. The chip which resides within any such system will therefore need to sample such an information, convert it into digital for processing, process it, assess the situation and then proactively react to prevent any prospective collisions.

In many new automotive applications like Radar, Motor control etc., there is sometimes need to sample the same signal via multiple ADCs to increase the effective throughput (pipelining of ADCs) and accuracy of the ADC digitized data (through averaging of data obtained from the different ADCs). Thus, a number of ADCs on a single SoC has two direct implications. Firstly, each ADC will use an input path and thus have a pad dedicated for it. Secondly, a module like a Cross Triggering Unit (CTU) is required in the ADAS sub-system to selectively trigger one of the ADCs to start the conversion. Then the data from the ADCs sampling the same signal is taken, it is pipelined if an increased throughput is needed and averaging is done on this data for increased accuracy. Clearly for any of these applications software complexities come into picture.

Proposed solution
What if the hardware itself is such that with a single trigger the entire ADC pipelining sub-system works? This will definitely do away with two problems; firstly we will not need a dedicated module like CTU for the ADAS sub-system, and secondly, since the problem is completely handled in hardware itself the software need not be complicated.

Also the present ADAS sub-systems need a number of dedicated pads for ADCs. This cannot be done away with simply because there are problems of charge sharing between the ADC input channels on which the sampling capacitor charges to an input voltage through a common path. To understand this issue better refer figure 1.

Figure 1: a) ADC Pipelining Sub-system. b) Issue in current pipelining method.

When ADC1 starts sampling the signal coming through the resistive path first and it has accumulated some charge and just then the sampling phase of ADC2 begins, a droop is observed in the charge on the sampling capacitor of ADC1 because in effect the sampling capacitor of ADC2 can get charged through two paths, one the input channel itself and second the capacitor of ADC1. The problem this poses is that after the voltage accumulated on the ADC1 sampling capacitor falls, it needs to charge again to the complete value which does not necessarily happen always and so ADC1 ends up converting an incorrect voltage. Refer figure 1(b) for this.

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