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Menta unveils dev't tool for flexible SoCs

17 Feb 2015

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Menta introduced the eFPGA Creator tool suite that allows developers to create customisable programmable logic architecture. The eFPGA Creator gives users the ability to define, build, analyse and validate the target capacity, performance, interconnect density and programming method. It also enables embedded-FPGA configurability for any system on chip (SoC), on any process technology and targets telecommunications, automotive, space and defence applications.

The eFPGA Creator suite accelerates the development of flexible SoCs with Menta's customisable embedded-FPGA IP products. It creates the eFPGA Core IP suited for the end application. Its graphical user interface (GUI) assists the designer through the definition of the tile, and core parameters such as capacity, size, aspect ratio and process constraints (technology, target performance, target power consumption).

The generator tool automatically builds a fully hierarchical structure based on configured compact tiles. This eFPGA Core IP can be customised to integrate specific hardware accelerators and functions, and designers can select the configuration storage mechanism based on the process and library availability such as SRAM, NVRAM or anti-fuse.

The Analyser tool helps designers fine tune the best architecture parameters (LUT size, routing needs, I/Os) for the target application.

Closely coupled with silicon flow and the Analyser, eFPGA Creator's user friendly environment enables designers generate detailed performance, power and area reports, as well as all the necessary information required to embed the eFPGA Core IP into the target SoC.

"With eFPGA Creator, we provide more degrees of freedom to users of our embedded-FPGA IP technology," stated Laurent Rougé, Menta founder and CEO. "Designers retain the flexibility to retarget their designs to advanced silicon process and configure them for the best performance, area, and configurability trade-offs."




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