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Power-efficient FPGAs yield high capacity on-chip memory

25 Feb 2015  | Julien Happich

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Xilinx has announced its 16nm UltraScale+ family of FPGAs, which the company describes as 3D-on-3D (multiple dies using vertical FinFETs 3D transistors stacked on a 2.5D interposer) multi-processing SoCs (MPSoC).

The devices not only leverage the performance/watt boost from TSMC's 16FF+ FinFET 3D transistors, they also includes a novel interconnect optimisation technology dubbed SmartConnect and claims to provide an additional 20-30 per cent performance, area and power advantages, together with larger memory blocks to create high capacity on-chip memory for a variety of use cases.

16nm UltraScale+ family of FPGA

The so-called UltraRAM blocks pack several hundreds of megabits up to 432Mb and complement the previous generation BlockRAM (in the tens of megabits) for longer buffering such as deep packet and video buffering.

The UltraScale+ family including the company's Kintex UltraScale+ FPGA, Virtex UltraScale+ FPGA and Zynq UltraScale+, is said to deliver value far beyond a traditional process node migration providing two to five times greater system level performance/watt over 28nm devices, the company said.

The MPSoC technology stands for heterogeneous multi-processing, exemplified by the Zynq UltraScale+ family that integrates several hardened IP blocks to deliver about 5X system level performance/watt relative to previous alternatives. At the centre of the processing-subsystem is the 64bit quad-core ARM Cortex-A53 processor, capable of hardware virtualisation, asymmetric processing and full ARM TrustZone support.

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