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4-PLL clock generators target consumer, networking devices

27 Feb 2015

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Cypress Semiconductor Corp. has rolled out what it says is a high-performance programmable clock generator family that eases the design of consumer and networking systems. The CY27410 4-PLL (phase-locked loop) clock generator can generate up to 12 programmable output frequencies on a single chip with remarkable jitter performance, according to the company.

CY27410

With support for frequencies up to 700MHz and RMS phase jitter of 0.7ps, the CY27410 family can support reference clocks for PCIe 1.0/2.0/3.0, SATA1.0/2.0, 10GbE and USB1.0/2.0/3.0 peripherals. The devices support on-board programming using I2C interface, adding to design flexibility. They can also store up to eight different configuration settings that are selectable using external digital control pins. The family supports 12 single-ended clock outputs, as well as eight differential output pairs that can be configured as HCSL, LVPECL, LVDS, CML or LVCMOS outputs. The devices also integrate a unique combination of value-added features that simplify design, including VCXO, glitch-free outputs, EMI-reduction, configurability as a zero or non-zero delay buffer, early/late clocks and PLL cascading.

The CY27410 clocks come with the CY3679 evaluation kit and CyClockWizard 2.0 programming software to help designers create their desired frequencies and to easily check device performance. The clock also saves board space and reduces BOM costs by consolidating system components to provide a flexible, low-cost solution.

The CY27410 clock generators are sampling, with production expected in 2Q15. The devices are available in a 48-pin QFN package.




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