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MCU vendors gun for lower power processing

26 Mar 2015  | Rich Quinnell

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And the winner is ... you!

It can be tempting to dismiss this constant litany of ever-improving low-power results as mere "benchmarketing," but there is real value for developers to be gained from this activity, according to EEMBC's Levy.

  • It takes a benchmark like this and a little competition to get folks to figure out how to improve their products. Yes, they're figuring out how to get better scores, but they're not cheating. It's all within the bounds of the benchmark. What they are doing is learning how to optimise their code, switch into low power modes faster, and the like.

Such lessons translate into hardware designed to offer a range of power-saving techniques as well as software tips vendors can pass along to customers. "The same thing happened with the CoreMark," noted Levy. "Vendors figured out compiler options that could improve performance, things that compilers should have had all along but it took the competition to stimulate adoption."

"One of the things we have learned," said STMicro's Product Marketing Manager Stuart McLaren, "is to provide a lot of flexibility in our low-power modes. The ULP benchmark is just one application of low power. Other applications are different, and we need a lot of modes available so developers can pick and choose the right ones for their applications."

"We've also added a lot more intelligence to peripherals," added STMicro Staff Applications Engineer Alec Bath. "Our I2C interface, for instance, performs address matching and only wakes the CPU up when there is a message for the device. Otherwise, it ignores traffic and lets the CPU sleep. We also provide clock sources for the ADC and other peripheral that are not tied to the CPU clock, so that they can run as needed when the CPU is throttled back or asleep. There are also DMAs so peripherals can send data directly to RAM and only wake the CPU when the transfer is complete."

Atmel's Eieland noted that at first low-power development efforts mainly concentrated on architectural improvements to the CPU. "But optimising the CPU was not enough," he added, "so we have started going through every peripheral and optimising it, looking at every transistor in the product. We started developing clock-on-demand features, logic that allows peripherals to operate stand-alone, using the minimum circuitry needed to complete their task, gating away the clock and even establishing a variety of power domains so we could shut down circuits not in use and eliminate even their leakage current."

The low-power quest is also opening up software opportunities where developers can chain events in software using one event to trigger another peripheral, without CPU involvement, Eieland said. "There is also an extra, parallel interrupt layer available, creating one IRQ thread for the CPU and another for the peripherals."

Low-power operation may not affect how developers write their main loops, Eieland added, but they should look for opportunities to use sleep modes and smart peripherals to their advantage. He also noted that STMicro offers seminars showing developers how to get the best power performance out of their designs.

"Today's compilers are not designed with energy in mind," said Ambiq's Salas in an interview with EE Times. "But software has an important contribution to make to the power equation, so we're spending a lot of effort looking at software. For instance, we took apart a Bluetooth stack to see where the energy is being consumed, and discovered we could save energy by re-partitioning the stack in the right way."

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