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Design software aims to boost FPGA, SoC FPGA design process

10 Nov 2015

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Altera Corp. has announced the Quartus Prime design software that builds upon the company's Quartus II software and incorporates the productivity-centric Spectra-Q engine. The design software is optimised to improve the FPGA and SoC FPGA design process by minimising design iterations, speeding up compile times and boost silicon performance.

Quartus Prime design software users will experience the same easy-to-use front-end user interface as the previous software version; while the addition of the Spectra-Q engine on the back-end enables unprecedented compile time improvements and increased design performance with a new set of faster and more scalable algorithms, stated the company. The engine also features a hierarchical database that preserves placement and routing of IP blocks to ensure stable designs, while eliminating unnecessary timing closure efforts and reducing compile times. Working with early access customers, the Quartus Prime design software demonstrated significantly higher design performance and designer productivity in multiple Arria 10 designs.

Quartus Prime

According to the company, the release of the Quartus Prime design software version 15.1 allows customers targeting Arria 10 designs to experience: a full speed-grade advantage on average over the previous software version with the new Hybrid Placer and Global Router algorithms; up to 10X faster IO design with the BluePrint Platform Designer; up to 4X faster compile times using the software's Rapid Recompile feature; and expanded hardware description language support, including SystemVerilog-2005 and VHDL-2008.

Quartus Prime design software is offered in three editions based on customers' design requirements. The Quartus Prime Pro Edition offers the latest performance and productivity tools that support Altera's latest high-performance FPGAs and SoC FPGAs. The Quartus Prime Standard Edition supports devices in Altera's new product category and the Quartus Prime Lite Edition support Altera's high-volume device families. The Pro and Standard editions require an annual software license, while the Lite edition is available as a free download with no license file required.

The Quartus Prime design software provides users access to Altera's extensive collection of IP cores. Additions and enhancements in the latest software release include four forward error correction (FEC) DSP cores, a 2.5G dynamic rate change option to the low-latency 10G Ethernet MAC and the 1G/2.5G/10G multi-rate Ethernet PHY, as well as improved usability features for external memory interface IP. Dynamically generated and configurable hardware design examples are also included, which simplify IP evaluation on hardware to further improve designer productivity.

The Quartus Prime design software is available for download. The Quartus Prime Pro and Standard editions come with the ModelSim-Altera Starter edition software and a full license to the IP Base Suite. The annual software license is $2,995 for a node-locked PC license and is available for purchase at Altera's eStore.




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