Path: EDN Asia >> News Centre >> IC/Board/Systems Design >> RISC-V welcomes Google, HP, Oracle
IC/Board/Systems Design Share print

RISC-V welcomes Google, HP, Oracle

29 Dec 2015  | Rick Merritt

Share this page with your friends

RISC-V is making significant headway in establishing itself as an open source alternate to ARM and Mips. Fifteen sponsors, which include a number of high tech companies, are queuing up to be the first members of its new trade group that will host its third workshop for the processor core.

RISC V is the latest evolution of the original RISC core developed more than 25 years ago by Berkeley's David Patterson and Stanford's John Hennessey. In August 2014, Patterson and colleagues launched an open source effort around the core as an enabler for a new class of processors and SoCs with small teams and volumes that can't afford licensed cores or get the attention of their vendors.

Google, Hewlett Packard Enterprise (HPE), Lattice, Microsemi and Oracle will be among the first members of RISC-V. Tool vendor Bluespec also is joining the group. The group is still drafting the details of the open source license that will be part of its member agreement. The terms will specify a zero-royalty RAND license as well as verification suites licensees must run to use the RISC-V logo.

Users will need to contribute as open source any changes they make to the core. Nevertheless, "there's plenty of room for secret sauce and company-specific implementations," said Rick O'Connor, executive director of the RISC-V Foundation.

RISC-V

RISC V, the latest evolution of the original RISC core, opens door to new members.

Presently, RISC-V runs Linux and NetBSD, but not Android, Windows or any major embedded RTOSes. Support for other operating systems is expected in 2016.

So far, a camera SoC is the only shipping chip said to use the open source core commercially. A handful of university projects use the core including a government-supported effort at IIT Madras in India to develop a home-grown processor family. The IIT chips and three or four other processors in the works use the Rapid IO interconnect as a front-side bus, said O'Connor who also manages the Rapid IO trade group.

1 • 2 Next Page Last Page


Want to more of this to be delivered to you for FREE?

Subscribe to EDN Asia alerts and receive the latest design ideas and product news in your inbox.

Got to make sure you're not a robot. Please enter the code displayed on the right.

Time to activate your subscription - it's easy!

We have sent an activate request to your registerd e-email. Simply click on the link to activate your subscription.

We're doing this to protect your privacy and ensure you successfully receive your e-mail alerts.


Add New Comment
Visitor (To avoid code verification, simply login or register with us. It is fast and free!)
*Verify code:
Tech Impact

Regional Roundup
Control this smart glass with the blink of an eye
K-Glass 2 detects users' eye movements to point the cursor to recognise computer icons or objects in the Internet, and uses winks for commands. The researchers call this interface the "i-Mouse."

GlobalFoundries extends grants to Singapore students
ARM, Tencent Games team up to improve mobile gaming


News | Products | Design Features | Regional Roundup | Tech Impact