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Weighing in on chip stack for CMOS image sensors

01 Feb 2016  | Junko Yoshida

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Although this development seems counter-intuitive, Cambou said the industry has recently observed "pixel size decreased image quality." In fact, higher resolution does not necessarily bring "better" images, mainly because of limitation in lenses, he explained.

"There is currently a sweet spot slightly above 1µm pixel size, and resolution between 12MP and 16MP," he added.

The flip side of the image quality/pixel race is the cost and size of the camera, Cambou explained.

It's important to note that the footprint and height of a camera module is highly constrained.

"Because the smartphone is a highly optimised device, any space available is where more battery goes or better features are integrated," said Cambou. "The thickness of the camera has direct consequences on the thickness of the smartphone," and the look of the device.

Yole has observed that the size of modules integrated into mobile phones has stayed relatively constant, typically 10mm x 10mm x 6 mm. Meanwhile, their performance and features increased dramatically (from VGA single lens, to 16MP AF and OIS 6 lens camera).

It turns out that stacked CIS can answer two of CIS designers' key concerns: image quality and camera size, according to Cambou.

First, the stacked approach allows chip designers to focus CIS process development on pixel performance only, "without constraints of the digital part of the chip, which is relegated on the secondary chip," Cambou explained. The sensing chip (on top) is Back Side Illuminated (BSI). BSI is already the best available technique, he said. "It can use a relatively coarse process (0.18µm to 0.110µm)." The digital chip can be sourced from any vendor with a state of the art process (65nm or 45nm). The overall performance of the chip "benefits from an optimised sensing array, with an optimised digital part," he concluded.

Second, by stacking the sensing array on top of the digital chip, the footprint is divided by two, which allows for much smaller camera modules, Cambou explained.

Mobile camera modules

Market trend of mobile camera modules (Source: Yole Development)

Challenges in chip stacking

Of course, chip stacking doesn't come without its own challenges.

The main issue is "to maintain yield under a reasonable level," said the Yole analyst. "The cost of the chip is doubled by its stacking process. Therefore, the design and manufacturing processes alike have to be extremely robust."

It is Cambou's opinion that "up to now, only Sony is mastering the [chip stacking] technique." Although Samsung and Omnivision publicised stacked chip releases, they have not been able to scale up, Cambou observed.

As a purely economic issue, the stacking process is only interesting if the digital surface of the chip is equal to the surface of the sensing array, he explained.

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