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0.6V ECG readout chip targets wearable medical apps

04 Mar 2016

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Imec and Holst Centre unveiled a 0.6V ECG readout chip in 40nm technology based on time-domain circuit techniques. The chip maintains consistent beat detection capabilities, even under movement (about 40mVpp), paving the way to a low cost, low power multi-sensor SoCs solution for wearable medical applications.

ECG readout chip

There is a clear need for emerging applications in personal healthcare to add more digital signal processing capabilities and memory storage within the system itself. While today's digital ICs and memory ICs benefit from technology scaling in terms of power and area, this has yet to be achieved for analogue readout electronics. Present modern analogue circuit techniques don't result in a significantly reduced area in scaled technologies, and due to the accompanied reduced supply voltage (VDD) with scaled technologies, the analogue front-end readout chip faces significant challenges in combining a large dynamic range with small size and low power consumption.

The ECG readout chip is only 0.015mm2 implemented in TSMC 40nm CMOS. It can handle up to 40mVpp AC sigma and up to 300mV DC-electrode offset while consuming only 3.3μW from a 0.6V supply. By acquiring an ECG signal from the noise-stress database, the system does not saturate and is able to maintain a consistent beat detection capability even in presence of vigorous motion. This was achieved by implementing a time-domain-based readout architecture, which leverages the benefits of technology scaling and it avoids the need for area intensive analogue circuitry, such as high-gain amplifiers and passives. The readout chip achieves performance that is comparable with current state-of-the-art implementations at a fraction of the area.

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