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MOSFETs burn zero power to balance supercaps

24 Mar 2016  | Robert L. Chao

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A step-by-step example illustrates how Supercap Auto Balancing (SAB) MOSFETs balance supercapacitor stacks with zero power burn. Assume that supercapacitors C1 and C2 have same capacitance values but different leakage currents profiles as shown in the graph featured in figure 2 below.

An ALD910024 SAB MOSFET device is used for this example to highlight the tremendous swings in current levels. Cells C1 and C2 leakage current characteristics as a function of cell voltages were shown in the graph. With no balancing, leakage currents of C1 would follow its curve whereas that of C2 would have followed the dotted line to reach a balanced leakage current level of 1.1 uA for both cells, reaching VC2 = 2.9V, exceeding its rated voltage. Adding SAB MOSFETs would bend C2 leakage current curve to follow IC2 + IOUT2 curve instead. The leakage currents of C1 and C2 would now balance at 2.203 uA, at VC1 =2.15V and VC2 =2.45V respectively, protecting both cells from over-voltage.

MOSFET active balancing while achieving zero power burn

Figure 2: Adding ALD ALD910024 SAB MOSFETs would bend C2 leakage current curve to follow IC2 + IOUT2 curve.

MOSFETs interact with supercapacitors for zero power burn
The circuit action in figures 2 and 3 can best be illustrated in three separate smaller steps.

Step 1

At Step 1, initially when VOUT voltage is at 2.30V, the leakage currents of IOUT1 + IC1 add up to 2.9 uA while IOUT2 + IC2 add up to 0.9 uA. In other words, the leakage currents are not in balance while VC1 = VC2 =2.30V. Therefore VOUT = 2.30V voltage is going to rise a little bit as IC1 current charges C2 up until SAB MOSFET M2 is turned on a little bit harder while M1 is turned off a little bit softer.

As SAB MOSFET output current changes exponentially with its bias voltage, IOUT1 and IOUT2 changes exponentially in opposite directions with small VOUT voltage changes.

At Step 2, which is an arbitrary intermediate voltage point, VOUT voltage now rises to 2.40V, which translates to VC1 =2.20V and VC2 =2.40V. The total leakage current equation is still IC1 + IOUT1 = IC2 + IOUT2.

Now let's take a look at the different currents under this new voltage condition. IC1 is now approximately 2.40 uA (see graph in figure 2). IOUT1 is now at approximately 0.01 uA (see datasheet of ALD910024). Similarly, IC2 is at approximately 0.85 uA and IOUT2 is at approximately 1.0 uA. The leakage currents of IOUT1 + IC1 now add up to 2.41 uA while IC2 + IOUT2 add up to 1.85 uA. The leakage currents are still not in balance, which forces VOUT voltage to continue to rise.

Figure 3: Two supercapacitors stacked in series with ALD910024SAL MOSFETs.

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