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On-chip PVT monitoring to streamline shrinking SoC design

21 Apr 2016  | Ramsay Allen

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As a result, the available technologies will have to be squeezed by designers to get the extra level of performance. In addition, the environment in automotive is harsh. So when you look at all of these together it is clear there is definitely room for die optimisation, as well as the requirement for basic monitoring purely for safety and reliability reasons.

How important is accurate monitoring?

Accurate PVT monitors are key to implementing die optimisation. We all know the relationship between power consumption and supply voltage of CMOS logic. Being able to reduce the supply by even a few per cent based on that particular die's process point, also combined with the environmental conditions that allow, will result in power savings worth having. The same is true with performance, if a given clock speed can be met with a lower supply. But none of this is possible if the monitors are not accurate.

How critical has monitoring become?

PVT monitors are not anything new. They have been used in the industry for a long time, however, not generally in what I call mission critical roles. Once you start looking at optimisation and potentially putting them into dynamic control systems, which is where we are now seeing customers use our latest generation of die monitors, then reliability and testability are absolutely critical.

Having features within the PVT monitors to ensure they can be tested easily in production is a minimum entry requirement, but in addition to that, being able to know the data from these monitors can be trusted is fundamental. As such, I believe having in-field, fault detection and reporting built into the monitors is key.

Let us consider the situation where a chip within a smartphone or tablet contains a temperature monitor which fails and this failure effectively tells the system that the temperature is zero when it is actually 50°C, and because of this the system decides it can run with higher clock rates pushing the die temperature up even further.

The result could be very serious indeed. Because of this robust operation of PVT monitors is becoming a primary concern.

Moortec's latest generation of monitors feature exactly this level of robust operation, and fault detection, complete with all the usual production testability which should be expected from such devices.

Where do you see the future of on chip monitoring?

On-chip PVT monitoring is here now and it is here to stay. The costs of advanced node technologies are continuing to increase, and I think we are already starting to see a fragmentation, with the really advanced nodes becoming more niche for those devices which really need the performance. For those nodes, optimisation will be part of the architecture to ensure the cost of those expensive technologies are maximised.

As the rest of the industry moves down to smaller nodes, they will look to differentiate their products from their competitor and good die optimisation will play a part in that.


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