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Fusing DDC with low voltage tech for IoT, wearables

25 Apr 2016  | Peter Clarke

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Mie Fujitsu Semiconductor Ltd, a Japanese chip maker, and CSEM SA, a Swiss research institute, have joined forces on Deeply Depleted Channel (DDC) technology and near/sub-threshold voltage technology for ICs geared for the Internet of Things (IoT) and wearables space.

The collaboration aims to develop a best-in-class extreme-low power (ELP) platform for IC fabrication with the associated ecosystem to enable chip designs for energy-critical wearable and IoT devices, the organisations indicated. The platform is due to be ready for limited release in 4Q16.

The agreement encompasses the development of ultra-low voltage standard cell libraries, power management cells and memories as well as the development of a demonstrator circuit to show the technology. The agreement also includes cross-licensing of related IP.

ELP platform

The agreement comes a year after Mie Fujitsu acquired the low-power CMOS technology using DDC transistors from the original developer SuVolta Inc. and that company was wound up. Both United Microelectronics Corp. and Fujitsu, the shareholders in Mie Fujitsu were licensees of the technology. CSEM, with origins that grew out of the Swiss watch industry, also has history in expertise in extremely low power electronic circuitry.

The team banking on the ability to combine the DDC method with low voltages to produce circuits with superior energy efficiency in relatively mature and low-cost process technologies such as 55nm and 40nm CMOS.

The DDC technology allows fabrication of low-leakage transistors operating at supply voltages (Vdd) below 0.5V to obtain superior power efficiency. The partnership claims dynamic power savings of up to 60 per cent and static power savings of up to 98 per cent.

Applying DDC to 40/55nm CMOS along with mixed-signal/RF and embedded non-volatile memory allows highly integrated analogue and RF SoCs for IoT and wearable platforms.

The development is being conducted by way of direct collaboration between process engineers, library specialists and ULP design experts in Japan and Europe.

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