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Three prophecies for high speed serial link systems

10 May 2016  | Eric Bogatin

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I hear that the weak link in achieving this low level of isolation is in the via field under the BGA. At this low level of crosstalk required, issues such as differential to differential coupling in the via field under the BGA and common noise to differential noise conversion in all via fields, in connectors and in channel to channel cross talk, can be showstoppers. While it may be possible, with good engineering practices and optimised pad stack design to reduce cross talk to the -50dB level, getting to -70dB is a major engineering effort.

At this level, as well designed as a via area is, manufacturing variations in the fabricated board can push a system into too much cross talk.

There are some fundamental limitations to what can be done at the board level if the package footprint is poorly designed. This puts a larger burden on the silicon providers to design the package footprint with channel to channel cross talk at the board level via field in mind. This does not play to their strengths.

While getting one channel operating at 56Gbit/s PAM4 is possible, getting hundreds of channels operating, in close proximity, at acceptable bit error ratio, maybe require heroic efforts.

All is not doom and gloom

I did hear of one innovation that may be the saviour for high-speed serial links in copper-based interconnects. Given the increasing challenges to get a long channel operating at 28Gbit/s in PAM2-NRZ or a 56Gbit/s channel operating at PAM4, there may be an intermediate fix available. Every large connector company I spoke with has a practical plan to implement cabled interconnects integrated with the board to supplement laminated backplane and motherboard routing.

The advantage of a cabled system is lower loss and less channel-to-channel cross talk. The larger circumference in the round conductors means lower conductor loss per length in a cable than on a board. While there may be lower cross talk in the cable interconnects, the cross talk in the connector and its board footprint still needs to be considered, but many of the connector companies seem very good at this.

These solutions involve a connector system to mate between the board and an array of cables and back to the board. The idea is to route long distance, high bandwidth signals off the board, through cables and then back to the board. A nice feature of the Samtec system is the integration of optical cables as well as copper cables to ease the transition to board-level optical interconnects.

Firefly interconnect system

Figure 3: Samtec's Firefly interconnect system merges optical and electrical connections to improve signal integrity.

This sort of approach, with a much lower loss at 14GHz and 28GHz, maybe the short-term fix to enable both a robust 56Gbit/s (28Gbaud) PAM4 or an PAM2-NRZ 56Gbit/s system without the headaches of extremely high isolation requirements of a PAM4 system.

This sort of backplane architecture moves the interconnect roadmap onto a different trajectory and may give additional headroom to copper interconnects into the next generation of data rates. With the option of also including fibre optics, it may be the 'gateway drug' into the long touted optical backplane architecture of the future.

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